Download or read book Nested Low density Lattice Codes Based on Non binary LDPC Codes written by Ankit Ghiya and published by . This book was released on 2010 with total page 48 pages. Available in PDF, EPUB and Kindle. Book excerpt: A family of low-density lattice codes (LDLC) is studied based on Construction-A for lattices. The family of Construction-A codes is already known to contain a large capacity-achieving subset. Parallels are drawn between coset non-binary low-density parity-check (LDPC) codes and nested low-density Construction-A lattices codes. Most of the related research in LDPC domain assumes optimal power allocation to encoded codeword. The source coding problem of mapping message to power optimal codeword for any LDPC code is in general, NP-hard. In this thesis, we present a novel method for encoding and decoding lattice based on non-binary LDPC codes using message-passing algorithms.

Download or read book Design of Network Coding Schemes in Wireless Networks written by Zihuai Lin and published by CRC Press. This book was released on 2022-06-23 with total page 167 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides a consolidated view of the various network coding techniques to be implemented at the design of the wireless networks for improving its overall performance. It covers multiple sources communicating with multiple destinations via a common relay followed by network coded modulation schemes for multiple access relay channels. Performance of the distributed systems based on distributed convolutional codes with network coded modulation is covered including a two-way relay channel (TWRC). Two MIF protocols are proposed including derivation of signal-to-noise ratio (SNR) and development of threshold of the channel conditions of both. Features: Systematically investigates coding and modulation for wireless relay networks. Discusses how to apply lattice codes in implementing lossless communications and lossy source coding over a network. Focusses on theoretical approach for performance optimization. Includes various network coding strategies for different networks. Reviews relevant existing and ongoing research in optimization along with practical code design. This book aims at Researchers, Professionals and Graduate students in Networking, Communications, Information, Coding Theory, Theoretical Computer Science, Performance Analysis and Resource Optimization, Applied Discrete Mathematics, and Applied Probability.

Download or read book A Class of Non binary LDPC Codes written by Deepak Gilra and published by . This book was released on 2003 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: In this thesis we study Low Density Parity Check (LDPC) and LDPC like codes over non-binary fields. We extend the concepts used for non-binary LDPC codes to generalize Product Accumulate (PA) codes to non-binary fields. We present simulation results that show that PA codes over GF(4) performs considerably better than binary PA codes at smaller block lengths and slightly better at large block lengths. We also propose a trellis based decoding algorithm to decode PA codes and show that its complexity is considerably lower than the message-passing algorithm. In the second part of the thesis we study the convergence properties of non-binary PA codes and non-binary LDPC codes. We use EXIT-charts to study the convergence properties of non-binary LDPC codes with different mean column weights and show why certain irregularities are better. Although the convergence threshold predicted by EXIT-charts on non-binary LDPC codes is quite optimistic we can still use EXIT-charts for comparison between non-binary LDPC codes with different mean column weights.

Download or read book Algebraic Constructions of High Performance and Efficiently Encodable Non binary Quasi cyclic LDPC Codes written by Bo Zhou and published by . This book was released on 2008 with total page 292 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Low complexity Decoding Algorithms and Architectures for Non binary LDPC Codes written by Fang Cai and published by . This book was released on 2013 with total page 149 pages. Available in PDF, EPUB and Kindle. Book excerpt: Non-binary low-density parity-check (NB-LDPC) codes can achieve better error-correcting performance than their binary counterparts when the code length is moderate at the cost of higher decoding complexity. The high complexity is mainly caused by the complicated computations in the check node processing and the large memory requirement. In this thesis, three decoding algorithms and corresponding VLSI architectures are proposed for NB-LDPC codes to lower the computational complexity and memory requirement. The first design is based on the proposed relaxed Min-max decoding algorithm. A novel relaxed check node processing scheme is proposed for the Min-max NB-LDPC decoding algorithm. Each finite field element of GF(2p̂) can be uniquely represented by a linear combination of $p$ independent field elements. Making use of this property, an innovative method is developed in this paper to first find a set of the p most reliable variable-to-check messages with independent field elements, called the minimum basis. Then the check-to-variable messages are efficiently computed from the minimum basis. With very small performance loss, the complexity of the check node processing can be substantially reduced using the proposed scheme. In addition, efficient VLSI architectures are developed to implement the proposed check node processing and overall NB-LDPC decoder. Compared to the most efficient prior design, the proposed decoder for a (837, 726) NB-LDPC code over GF(25̂) can achieve 52% higher efficiency in terms of throughput-over-area ratio. The second design is based on a proposed enhanced iterative hard reliability-based majority-logic decoding. The recently developed iterative hard reliability-based majority-logic NB-LDPC decoding has better performance-complexity tradeoffs than previous algorithms. Novel schemes are proposed for the iterative hard reliability-based majority-logic decoding (IHRB-MLGD). Compared to the IHRB algorithm, our enhanced (E- )IHRB algorithm can achieve significant coding gain with small hardware overhead. Then low-complexity partial-parallel NB-LDPC decoder architectures are developed based on these two algorithms. Many existing NB-LDPC code construction methods lead to quasi-cyclic or cyclic codes. Both types of codes are considered in our design. Moreover, novel schemes are developed to keep a small proportion of messages in order to reduce the memory requirement without causing noticeable performance loss. In addition, a shift-message structure is proposed by using memories concatenated with variable node units to enable efficient partial-parallel decoding for cyclic NB-LDPC codes. Compared to previous designs based on the Min-max decoding algorithm, our proposed decoders have at least tens of times lower complexity with moderate coding gain loss. The third design is based on a proposed check node decoding scheme using power representation of finite field elements. Novel schemes are proposed for the Min-max check node processing by making use of the cyclical-shift property of the power representation of finite field elements. Compared to previous designs based on the Min-max algorithm with forward-backward scheme, the proposed check node units (CNUs) do not need the complex switching network. Moreover, the multiplications of the parity check matrix entries are efficiently incorporated. For a Min-max NB-LDPC decoder over GF(32), the proposed scheme reduces the CNU area by at least 32%, and leads to higher clock frequency.

Download or read book Properties of LDGM LDPC Codes with Applications to Secrecy Coding written by Manik Raina and published by . This book was released on 2010 with total page 44 pages. Available in PDF, EPUB and Kindle. Book excerpt: The ensemble of low-density generator-matrix/low-density parity-check (LDGM-LDPC) codes has been proposed in literature. In this thesis, an irregular LDGM-LDPC code is studied as a sub-code of an LDPC code with some randomly emph{punctured} output-bits. It is shown that the LDGM-LDPC codes achieve rates arbitrarily close to the channel-capacity of the binary-input symmetric-output memoryless (BISOM) channel with a finite lower-bound on the emph{complexity}. The measure of complexity is the average-degree (per information-bit) of the check-nodes for the factor-graph of the code. A lower-bound on the average degree of the check-nodes of the irregular LDGM-LDPC codes is obtained. The bound does not depend on the decoder used at the receiver. The stability condition for decoding the irregular LDGM-LDPC codes over the binary-erasure channel (BEC) under iterative-decoding with message-passing is described. The LDGM-LDPC codes are capacity achieving with bounded complexity and possess natural binning/nesting structure. These codes are applied to secrecy coding. The problem of secrecy coding for the type-II binary symmetric memoryless wiretap channel is studied. In this model, the main channel is binary-input and noiseless and the eavesdropper channel is binary-symmetric memoryless. A coding strategy based on emph{secure nested codes} is proposed. A capacity achieving length-$n$ code for the eavesdropper channel bins the space ${0,1}^n$ into co-sets which are used for secret messaging. The resulting co-set scheme achieves secrecy capacity of the type-II binary symmetric memoryless channel. As an example, the ensemble of capacity-achieving regular low-density generator-matrix/low-density parity-check (LDGM-LDPC) codes is studied as a basis for binning. The previous result is generalized to the case of a noisy main-channel. The problem of secrecy-coding for a specific type-I wiretap channel is studied. In the type-I wiretap channel under consideration, the main channel is a binary-input symmetric-output memoryless (BISOM) channel and the eavesdropper channel is a binary-symmetric channel (BSC). A secure-nested-code that achieves perfect-secrecy for the above type-I channel is proposed. The secure-nested-code is based on a nested regular LDGM-LDPC code construction.

Download or read book Efficient VLSI Architectures for Non binary Low Density Parity Check Decoding written by Fang Cai and published by . This book was released on 2011 with total page 95 pages. Available in PDF, EPUB and Kindle. Book excerpt: Non-binary low-density parity-check (NB-LDPC) codes can achieve better error-correcting performance than binary LDPC codes when the code length is moderate at the cost of higher decoding complexity. The high complexity is mainly caused by the complicated computations in the check node processing and the large memory requirement. In this thesis, two VLSI designs for NB-LDPC decoders based on two novel check node processing schemes are proposed. The first design is based on forward-backward check node processing. A novel scheme and corresponding architecture are developed to implement the elementary step of the check node processing. In our design, layered decoding is applied and only nm less than q messages are kept on each edge of the associated Tanner graph. The computation units and the scheduling of the computations are optimized in the context of layered decoding to reduce the area requirement and increase the speed. This thesis also introduces an overlapped method for the check node processing among different layers to further speed up the decoding. From complexity and latency analysis, our design is much more efficient than any previous design. Our proposed decoder for a (744, 653) code over GF(32) has also been synthesized on a Xilinx Virtex-2 Pro FPGA device. It can achieve a throughput of 9.30 Mbps when 15 decoding iterations are carried out. The second design is based on a proposed trellis based check node processing scheme. The proposed scheme first sorts out a limited number of the most reliable variable-to-check (v-to-c) messages, then the check-to-variable (c-to-v) messages to all connected variable nodes are derived independently from the sorted messages without noticeable performance loss. Compared to the previous iterative forward-backward check node processing, the proposed scheme not only significantly reduced the computation complexity, but eliminated the memory required for storing the intermediate messages generated from the forward and backward processes. Inspired by this novel c-to-v message computation method, we propose to store the most reliable v-to-c messages as 'compressed' c-to-v messages. The c-to-v messages will be recovered from the compressed format when needed. Accordingly, the memory requirement of the overall decoder can be substantially reduced. Compared to the previous Min-max decoder architecture, the proposed design for a (837, 726) code over GF(32) can achieve the same throughput with only 46% of the area.

Download or read book High Performance and Energy Efficient Decoder Design for Non Binary LDPC Codes written by Yuta Toriyama and published by . This book was released on 2016 with total page 133 pages. Available in PDF, EPUB and Kindle. Book excerpt: Binary Low-Density Parity-Check (LDPC) codes are a type of error correction code known to exhibit excellent error-correcting capabilities, and have increasingly been applied as the forward error correction solution in a multitude of systems and standards, such as wireless communications, wireline communications, and data storage systems. In the pursuit of codes with even higher coding gain, non-binary LDPC (NB-LDPC) codes defined over a Galois field of order q have risen as a strong replacement candidate. For codes defined with similar rate and length, NB-LDPC codes exhibit a significant coding gain improvement relative to that of their binary counterparts. Unfortunately, NB-LDPC codes are currently limited from practical application by the immense complexity of their decoding algorithms, because the improved error-rate performance of higher field orders comes at the cost of increasing decoding algorithm complexity. Currently available ASIC implementation solutions for NB-LDPC code decoders are simultaneously low in throughput and power-hungry, leading to a low energy efficiency. We propose several techniques at the algorithm level as well as hardware architecture level in an attempt to bring NB-LDPC codes closer to practical deployment. On the algorithm side, we propose several algorithmic modifications and analyze the corresponding hardware cost alleviation as well as impact on coding gain. We also study the quantization scheme for NB-LDPC decoders, again in the context of both the hardware and coding gain impacts, and we propose a technique that enables a good tradeoff in this space. On the hardware side, we develop a FPGA-based NB-LDPC decoder platform for architecture prototyping as well as hardware acceleration of code evaluation via error rate simulations. We also discuss the architectural techniques and innovations corresponding to our proposed algorithm for optimization of the implementation. Finally, a proof-of-concept ASIC chip is realized that integrates many of the proposed techniques. We are able to achieve a 3.7x improvement in the information throughput and 23.8x improvement in the energy efficiency over prior state-of-the-art, without sacrificing the strong error correcting capabilities of the NB-LDPC code.

Download or read book Improving the Performance of Nested LDPC Codes by Removing Problematic Graphical Structures written by Matthew L. Grimes and published by . This book was released on 2018 with total page 122 pages. Available in PDF, EPUB and Kindle. Book excerpt: In this thesis, we propose a method to design nested protograph-based low-density parity-check (LDPC) codes for network communications with low error-floors via a graph modification procedure. Lowering the error-floor of nested LDPC codes is essential for certain applications that require very low decoded error rates in moderate to high signal-to-noise-ratios (SNRs) like optical communication and data storage. The multi-level method we propose improves upon existing state-of-the-art algebraic designs by the identification and removal of harmful graph structures from nested LDPC codes based on protographs, effectively improving the performance of each of the nested codes in their error-floor region. Simulation results are provided to confirm the expected performance improvement.

Download or read book Non Binary Error Control Coding for Wireless Communication and Data Storage written by Rolando Antonio Carrasco and published by John Wiley & Sons. This book was released on 2008-11-20 with total page 322 pages. Available in PDF, EPUB and Kindle. Book excerpt: Comprehensive introduction to non-binary error-correction coding techniques Non-Binary Error Control Coding for Wireless Communication and Data Storage explores non-binary coding schemes that have been developed to provide an alternative to the Reed – Solomon codes, which are expected to become unsuitable for use in future data storage and communication devices as the demand for higher data rates increases. This book will look at the other significant non-binary coding schemes, including non-binary block and ring trellis-coded modulation (TCM) codes that perform well in fading conditions without any expansion in bandwidth use, and algebraic-geometric codes which are an extension of Reed-Solomon codes but with better parameters. Key Features: Comprehensive and self-contained reference to non-binary error control coding starting from binary codes and progressing up to the latest non-binary codes Explains the design and construction of good non-binary codes with descriptions of efficient non-binary decoding algorithms with applications for wireless communication and high-density data storage Discusses the application to specific cellular and wireless channels, and also magnetic storage channels that model the reading of data from the magnetic disc of a hard drive. Includes detailed worked examples for each coding scheme to supplement the concepts described in this book Focuses on the encoding, decoding and performance of both block and convolutional non-binary codes, and covers the Kötter-Vardy algorithm and Non-binary LDPC codes This book will be an excellent reference for researchers in the wireless communication and data storage communities, as well as development/research engineers in telecoms and storage companies. Postgraduate students in these fields will also find this book of interest.

Download or read book Design and Implementation for Non binary Low density Parity check Codes NB LDPC Decoders written by and published by . This book was released on 2012 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Low Complexity Decoding of Non binary LDPC Codes Over AWGN Channels written by Pia Aviva Zobel and published by . This book was released on 2009 with total page 80 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Theory and Practice of Non binary Graph based Codes written by Behzad Amiri and published by . This book was released on 2015 with total page 127 pages. Available in PDF, EPUB and Kindle. Book excerpt: We are undergoing a revolution in data. The ever-growing amount of information in our world has created an unprecedented demand for ultra-reliable, affordable, and resource-efficient data storage systems. Error-correcting codes, as a critical component of any memory device, will play a crucial role in the future of data storage. One particular class of error-correcting codes, known as graph-based codes, has drawn significant attention in both academia and in industry. Graph-based codes offer superior performance compared to traditional algebraic codes. Recently, it has been shown that non-binary graph-based codes, which operate over finite fields rather than binary alphabets, outperform their binary counterparts and exhibit outstanding overall performance. For this reason, these codes are particularly suitable for emerging data storage systems. In this dissertation, we present a comprehensive combinatorial analysis of non-binary graph-based codes. We perform both finite-length and asymptotic analyses for these codes, providing a systematic framework to evaluate and optimize various families of non-binary graph-based codes. In the finite-length case, we provide a mathematical characterization of the error floor problem, including a general definition of absorbing sets over non-binary alphabets. We consider several structured low-density parity-check (LDPC) codes, including quasi-cyclic and spatially-coupled codes, as well as unstructured LDPC codes. We offer design guidelines for non-binary LDPC codes with outstanding performance in extremely low error-rate regimes; making them excellent candidates for data storage applications. In the asymptotic case, we provide a novel toolbox for the evaluation of families of non-binary graph-based codes. By utilizing insights from graph theory and combinatorics, we establish enumerators for a general family of graph-based codes which are constructed based on protographs. We provide asymptotic distributions of codewords and trapping sets for the family of protograph-based codes. Furthermore, we present an asymptotic enumeration of binary and non-binary elementary absorbing sets for regular code ensembles. The contributions of this dissertation can potentially impact a broad range of data storage and communication technologies that require excellent performance in high-reliability regimes.

Download or read book Non binary Protograph based LDPC Codes written by Yizeng Sun and published by . This book was released on 2013 with total page 40 pages. Available in PDF, EPUB and Kindle. Book excerpt: Non-binary LDPC codes can outperform binary LDPC codes using sum-product algorithm with higher computation complexity. Non-binary LDPC codes based on protographs have the advantage of simple hardware architecture. In the first part of this thesis, we will use EXIT chart analysis to compute the thresholds of different protographs over GF(q). Based on threshold computation, some non-binary protograph-based LDPC codes are designed and their frame error rates are compared with binary LDPC codes. For maximum-likelihood decoder, weight enumerator can predict frame error rate of an LDPC code. In the second part of this thesis, we calculate weight enumerators of protograph-based non-binary LDPC code ensembles both for finite length case and asymptotic case. In addition, the trapping set and stopping set enumerators are presented.

Download or read book Adaptive Signal Processing in Wireless Communications written by Mohamed Ibnkahla and published by CRC Press. This book was released on 2017-12-19 with total page 551 pages. Available in PDF, EPUB and Kindle. Book excerpt: Adaptive techniques play a key role in modern wireless communication systems. The concept of adaptation is emphasized in the Adaptation in Wireless Communications Series through a unified framework across all layers of the wireless protocol stack ranging from the physical layer to the application layer, and from cellular systems to next-generation wireless networks. This specific volume, Adaptive Signal Processing in Wireless Communications is devoted to adaptation in the physical layer. It gives an in-depth survey of adaptive signal processing techniques used in current and future generations of wireless communication systems. Featuring the work of leading international experts, it covers adaptive channel modeling, identification and equalization, adaptive modulation and coding, adaptive multiple-input-multiple-output (MIMO) systems, and cooperative diversity. It also addresses other important aspects of adaptation in wireless communications such as hardware implementation, reconfigurable processing, and cognitive radio. A second volume in the series, Adaptation and Cross-layer Design in Wireless Networks(cat no.46039) is devoted to adaptation in the data link, network, and application layers.

Download or read book SSP written by and published by . This book was released on 2003 with total page 692 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book LDPC Codes on Finite Fields written by Juane Li and published by . This book was released on 2016 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: Due to their capacity-approaching performance which can be achieved with practically implementable iterative decoding algorithms devised based on belief-propagation, low-density parity-check (LDPC) codes have rapid dominance in the applications requiring error control coding. This dissertation is intended to address certain important aspects of the aforementioned issues about LDPC codes. Subjects to be investigated include: (1) flexible and systematic methods for constructing binary LDPC codes with quasi-cyclic structure based on finite fields; (2) construction of high-rate and low-rate quasi-cyclic (QC) LDPC codes to achieve very low error rates without error-floor and with high rate of decoding convergence; (3) construction of binary QC-LDPC codes whose Tanner graphs have girth 8 or larger and contain minimum number of short cycles; (4) developing effective algorithms for enumerating short cycles in the Tanner graph of LDPC codes; (5) devising reduced-complexity decoding schemes and algorithms for binary QC-LDPC codes; (6) effective matrix-theoretic methods for constructing nonbinary (NB) LDPC codes; and (7) reduced-complexity decoding schemes and algorithms for NB LDPC codes. The dissertation presents a simple, flexible and systematic method to construct both binary and nonbinary LDPC codes with quasi-cyclic (QC) structure based on two arbitrary subsets of a finite field. One technique for constructing QC-LDPC codes whose Tanner graphs have girth 8 or larger is also proposed. Simulation results show that these constructed codes perform well over both the additive white Gaussian noise and the binary erasure channels. Also presented in this dissertation is a reduced-complexity decoding scheme to decode binary QC-LDPC codes. The decoding scheme is devised based on the section-wise cyclic structure of the parity-check matrix of a QC-LDPC code. The proposed decoding scheme combined with iterative decoding algorithms of LDPC codes results in no or a relative small performance degradation. Two efficient algorithms for enumerating short cycles in the Tanners graph of LDPC codes are presented. One algorithm is devised based on iterative message-passing algorithm by introducing messages in term of monomials, which is an improvement of the work of Karimi and Banihashemi. The other one is based on the trellis of an LDPC code by finding the partial paths which can form cycles. By removing certain number of cycles, a new code whose Tanner graph has a smaller number of short cycles, a larger girth, or both can be constructed. An algorithm to count and find cycles of lengths four and six in a class of QC-LDPC codes is also proposed. In this dissertation, we also briefly investigate one of the algebraic-based constructions of LDPC code, namely superposition (SP) construction, and one of the graph-based constructions, namely protograph-based (PTG-based) construction. The SP-construction method is re-interpreted in a broader scope from both the algebraic and the graph-theoretic perspectives. From the graph-theoretic point of view, it is shown that the PTG-based construction of LDPC codes is a special case of the SP-construction. An algebraic method for constructing PTG-based QC-LDPC codes through decomposing a small matrix is proposed. Several methods for constructing QC-LDPC codes through the SP-construction are also presented.