Download or read book Fault Diagnosis and Design for testability for Integrated Sequential Circuits written by Tao Li and published by . This book was released on 1985 with total page 246 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Fault Diagnosis and Design for Testability Applied to Analogue Integrated Circuits written by Chung Kin Ho and published by . This book was released on 1998 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book IDDQ Testing of VLSI Circuits written by Ravi K. Gulati and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 121 pages. Available in PDF, EPUB and Kindle. Book excerpt: Power supply current monitoring to detect CMOS IC defects during production testing quietly laid down its roots in the mid-1970s. Both Sandia Labs and RCA in the United States and Philips Labs in the Netherlands practiced this procedure on their CMOS ICs. At that time, this practice stemmed simply from an intuitive sense that CMOS ICs showing abnormal quiescent power supply current (IDDQ) contained defects. Later, this intuition was supported by data and analysis in the 1980s by Levi (RACD, Malaiya and Su (SUNY-Binghamton), Soden and Hawkins (Sandia Labs and the University of New Mexico), Jacomino and co-workers (Laboratoire d'Automatique de Grenoble), and Maly and co-workers (Carnegie Mellon University). Interest in IDDQ testing has advanced beyond the data reported in the 1980s and is now focused on applications and evaluations involving larger volumes of ICs that improve quality beyond what can be achieved by previous conventional means. In the conventional style of testing one attempts to propagate the logic states of the suspended nodes to primary outputs. This is done for all or most nodes of the circuit. For sequential circuits, in particular, the complexity of finding suitable tests is very high. In comparison, the IDDQ test does not observe the logic states, but measures the integrated current that leaks through all gates. In other words, it is like measuring a patient's temperature to determine the state of health. Despite perceived advantages, during the years that followed its initial announcements, skepticism about the practicality of IDDQ testing prevailed. The idea, however, provided a great opportunity to researchers. New results on test generation, fault simulation, design for testability, built-in self-test, and diagnosis for this style of testing have since been reported. After a decade of research, we are definitely closer to practice.

Download or read book Fault Diagnosis and Fault Tolerance written by Tinghuai Chen and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 207 pages. Available in PDF, EPUB and Kindle. Book excerpt: With the rapid growth of integration scale of VLSI chips and the present need for reliable computers in space exploration, fault diagnosis and fault toleran ce have become more important than before, and hence reveal a lot of interest ing topics which attract many researchers to make a great number of contribu tions to this field. In recent years, many new and significant results have been achieved. A quick scan over the proceedings of the conferences on fault tolerant computing and design automation as well as on testing will convince the reader of that. But unfortunately these achievements have not been entire ly reflected in the textbooks, so that there seems to be a gap for the new researcher who already has the basic knowledge and wants to begin research in this area. As a remedy for this deficiency, this book is intended for begin ners, especially graduate students, as a textbook which will lead them to the frontier of some branches of the fault-tolerant computing field. The first chapter introduces the four-valued logic B4 and its applica tions. In 1966 Roth first proposed this four-valued logic as a technique to generate tests for logical circuits, but this work did not concern the mathe matical basis of B4 itself.

Download or read book Testing of Digital Systems written by N. K. Jha and published by Cambridge University Press. This book was released on 2003-05-08 with total page 1022 pages. Available in PDF, EPUB and Kindle. Book excerpt: Device testing represents the single largest manufacturing expense in the semiconductor industry, costing over $40 billion a year. The most comprehensive and wide ranging book of its kind, Testing of Digital Systems covers everything you need to know about this vitally important subject. Starting right from the basics, the authors take the reader through automatic test pattern generation, design for testability and built-in self-test of digital circuits before moving on to more advanced topics such as IDDQ testing, functional testing, delay fault testing, memory testing, and fault diagnosis. The book includes detailed treatment of the latest techniques including test generation for various fault models, discussion of testing techniques at different levels of integrated circuit hierarchy and a chapter on system-on-a-chip test synthesis. Written for students and engineers, it is both an excellent senior/graduate level textbook and a valuable reference.

Download or read book An Introduction to Logic Circuit Testing written by Parag K. Lala and published by Morgan & Claypool Publishers. This book was released on 2009 with total page 111 pages. Available in PDF, EPUB and Kindle. Book excerpt: An Introduction to Logic Circuit Testing provides a detailed coverage of techniques for test generation and testable design of digital electronic circuits/systems. The material covered in the book should be sufficient for a course, or part of a course, in digital circuit testing for senior-level undergraduate and first-year graduate students in Electrical Engineering and Computer Science. The book will also be a valuable resource for engineers working in the industry. This book has four chapters. Chapter 1 deals with various types of faults that may occur in very large scale integration (VLSI)-based digital circuits. Chapter 2 introduces the major concepts of all test generation techniques such as redundancy, fault coverage, sensitization, and backtracking. Chapter 3 introduces the key concepts of testability, followed by some ad hoc design-for-testability rules that can be used to enhance testability of combinational circuits. Chapter 4 deals with test generation and response evaluation techniques used in BIST (built-in self-test) schemes for VLSI chips. Table of Contents: Introduction / Fault Detection in Logic Circuits / Design for Testability / Built-in Self-Test / References

Download or read book Digital Circuit Testing written by Francis C. Wang and published by Academic Press. This book was released on 1991-07-28 with total page 266 pages. Available in PDF, EPUB and Kindle. Book excerpt: Recent technological advances have created a testing crisis in the electronics industry--smaller, more highly integrated electronic circuits and new packaging techniques make it increasingly difficult to physically access test nodes. New testing methods are needed for the next generation of electronic equipment and a great deal of emphasis is being placed on the development of these methods. Some of the techniques now becoming popular include design for testability (DFT), built-in self-test (BIST), and automatic test vector generation (ATVG). This book will provide a practical introduction to these and other testing techniques. For each technique introduced, the author provides real-world examples so the reader can achieve a working knowledge of how to choose and apply these increasingly important testing methods.

Download or read book Logic Testing and Design for Testability written by Hideo Fujiwara and published by MIT Press (MA). This book was released on 1985-06-01 with total page 298 pages. Available in PDF, EPUB and Kindle. Book excerpt: Today's computers must perform with increasing reliability, which in turn depends onthe problem of determining whether a circuit has been manufactured properly or behaves correctly.However, the greater circuit density of VLSI circuits and systems has made testing more difficultand costly. This book notes that one solution is to develop faster and more efficient algorithms togenerate test patterns or use design techniques to enhance testability - that is, "design fortestability." Design for testability techniques offer one approach toward alleviating this situationby adding enough extra circuitry to a circuit or chip to reduce the complexity of testing. Becausethe cost of hardware is decreasing as the cost of testing rises, there is now a growing interest inthese techniques for VLSI circuits.The first half of the book focuses on the problem of testing:test generation, fault simulation, and complexity of testing. The second half takes up the problemof design for testability: design techniques to minimize test application and/or test generationcost, scan design for sequential logic circuits, compact testing, built-in testing, and variousdesign techniques for testable systems.Hideo Fujiwara is an associate professor in the Department ofElectronics and Communication, Meiji University. Logic Testing and Design for Testability isincluded in the Computer Systems Series, edited by Herb Schwetman.

Download or read book Digital Integrated Circuits written by Evgeni Perelroyzen and published by CRC Press. This book was released on 2018-10-03 with total page 320 pages. Available in PDF, EPUB and Kindle. Book excerpt: A current trend in digital design-the integration of the MATLAB® components Simulink® and Stateflow® for model building, simulations, system testing, and fault detection-allows for better control over the design flow process and, ultimately, for better system results. Digital Integrated Circuits: Design-for-Test Using Simulink® and Stateflow® illustrates the construction of Simulink models for digital project test benches in certain design-for-test fields. The first two chapters of the book describe the major tools used for design-for-test. The author explains the process of Simulink model building, presents the main library blocks of Simulink, and examines the development of finite-state machine modeling using Stateflow diagrams. Subsequent chapters provide examples of Simulink modeling and simulation for the latest design-for-test fields, including combinational and sequential circuits, controllability, and observability; deterministic algorithms; digital circuit dynamics; timing verification; built-in self-test (BIST) architecture; scan cell operations; and functional and diagnostic testing. The book also discusses the automatic test pattern generation (ATPG) process, the logical determinant theory, and joint test action group (JTAG) interface models. Digital Integrated Circuits explores the possibilities of MATLAB's tools in the development of application-specific integrated circuit (ASIC) design systems. The book shows how to incorporate Simulink and Stateflow into the process of modern digital design.

Download or read book Thermal Testing of Integrated Circuits written by J. Altet and published by Springer Science & Business Media. This book was released on 2013-03-09 with total page 212 pages. Available in PDF, EPUB and Kindle. Book excerpt: Temperature has been always considered as an appreciable magnitude to detect failures in electric systems. In this book, the authors present the feasibility of considering temperature as an observable for testing purposes, with full coverage of the state of the art.

Download or read book Dft Dfd written by Nikhil Rahagude and published by LAP Lambert Academic Publishing. This book was released on 2011-02 with total page 96 pages. Available in PDF, EPUB and Kindle. Book excerpt: While conventional test point insertions commonly used in design for testability can improve fault coverage, the test points selected may not necessarily be the best candidates to aid silicon diagnosis. This book targets test point insertions to detect more faults as well as to distinguish currently indistinguishable fault-pairs. This is achieved by identifying those points in the circuit, which are not only hard-to-test but also lie on distinguishable frontiers, as Testability-Diagnosability (TD) points. To this end, a novel low-cost metric to identify such TD points is proposed. Further, a new DFT + DFD architecture is developed, which adds just one pin (to identify test/functional mode) and small additional combinational logic to the circuit under test. In the other part, improving diagnosis in BIST environment is targeted. To facilitate diagnosis, researchers have proposed the use of two additional on-chip embedded memories, response memory to store reference responses and fail memory to store failing responses. In this book, a novel architecture is proposed which requires only one additional memory and responses of only a small subset of available test patterns are stored.

Download or read book Digital Integrated Circuits written by Evgeni Perelroyzen and published by CRC Press. This book was released on 2018-10-03 with total page 306 pages. Available in PDF, EPUB and Kindle. Book excerpt: A current trend in digital design-the integration of the MATLAB® components Simulink® and Stateflow® for model building, simulations, system testing, and fault detection-allows for better control over the design flow process and, ultimately, for better system results. Digital Integrated Circuits: Design-for-Test Using Simulink® and Stateflow® illustrates the construction of Simulink models for digital project test benches in certain design-for-test fields. The first two chapters of the book describe the major tools used for design-for-test. The author explains the process of Simulink model building, presents the main library blocks of Simulink, and examines the development of finite-state machine modeling using Stateflow diagrams. Subsequent chapters provide examples of Simulink modeling and simulation for the latest design-for-test fields, including combinational and sequential circuits, controllability, and observability; deterministic algorithms; digital circuit dynamics; timing verification; built-in self-test (BIST) architecture; scan cell operations; and functional and diagnostic testing. The book also discusses the automatic test pattern generation (ATPG) process, the logical determinant theory, and joint test action group (JTAG) interface models. Digital Integrated Circuits explores the possibilities of MATLAB's tools in the development of application-specific integrated circuit (ASIC) design systems. The book shows how to incorporate Simulink and Stateflow into the process of modern digital design.

Download or read book Fault Diagnosis of Digital Systems written by Herbert Y. Chang and published by Krieger Publishing Company. This book was released on 1974 with total page 186 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book A Study of Fault Diagnosis of Sequential Logic Networks written by B. D. Carroll and published by . This book was released on 1974 with total page 25 pages. Available in PDF, EPUB and Kindle. Book excerpt: The research conducted on this project was concerned with the problem of test pattern generation for sequential logic circuits. More specifically, an algorithm was sought for generating test patterns for detecting single stuck-at faults in synchronous sequential circuits containing clocked flip-flop memory elements. In addition to the principal problem stated above, the related problems of test pattern generation for combinational iterative logic arrays and of test pattern generation for multiple faults in combinational logic circuits were also studied. A summary of the results obtained and the conclusions reached on the above problems is given. Suggestions for follow-on studies are discussed. Reprints of all papers published on the project are included in an appendix.

Download or read book Introduction to IDDQ Testing written by S. Chakravarty and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 336 pages. Available in PDF, EPUB and Kindle. Book excerpt: Testing techniques for VLSI circuits are undergoing many exciting changes. The predominant method for testing digital circuits consists of applying a set of input stimuli to the IC and monitoring the logic levels at primary outputs. If, for one or more inputs, there is a discrepancy between the observed output and the expected output then the IC is declared to be defective. A new approach to testing digital circuits, which has come to be known as IDDQ testing, has been actively researched for the last fifteen years. In IDDQ testing, the steady state supply current, rather than the logic levels at the primary outputs, is monitored. Years of research suggests that IDDQ testing can significantly improve the quality and reliability of fabricated circuits. This has prompted many semiconductor manufacturers to adopt this testing technique, among them Philips Semiconductors, Ford Microelectronics, Intel, Texas Instruments, LSI Logic, Hewlett-Packard, SUN microsystems, Alcatel, and SGS Thomson. This increase in the use of IDDQ testing should be of interest to three groups of individuals associated with the IC business: Product Managers and Test Engineers, CAD Tool Vendors and Circuit Designers. Introduction to IDDQ Testing is designed to educate this community. The authors have summarized in one volume the main findings of more than fifteen years of research in this area.

Download or read book Rational Fault Analysis written by Richard Saeks and published by Marcel Dekker. This book was released on 1977 with total page 264 pages. Available in PDF, EPUB and Kindle. Book excerpt: Information on the development of rational procedures for detection, location, & prediction of faults in a variety of systems. Includes a chapter on computer-aided fault analysis.

Download or read book Sequential Logic Testing and Verification written by Abhijit Ghosh and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 224 pages. Available in PDF, EPUB and Kindle. Book excerpt: In order to design and build computers that achieve and sustain high performance, it is essential that reliability issues be considered care fully. The problem has several aspects. Certainly, considering reliability implies that an engineer must be able to analyze how design decisions affect the incidence of failure. For instance, in order design reliable inte gritted circuits, it is necessary to analyze how decisions regarding design rules affect the yield, i.e., the percentage of functional chips obtained by the manufacturing process. Of equal importance in producing reliable computers is the detection of failures in its Very Large Scale Integrated (VLSI) circuit components, caused by errors in the design specification, implementation, or manufacturing processes. Design verification involves the checking of the specification of a design for correctness prior to carrying out an implementation. Implementation verification ensures that the manual design or automatic synthesis process is correct, i.e., the mask-level description correctly implements the specification. Manufacture test involves the checking of the complex fabrication process for correctness, i.e., ensuring that there are no manufacturing defects in the integrated circuit. It should be noted that all the above verification mechanisms deal not only with verifying the functionality of the integrated circuit but also its performance.