Download or read book Radiation Induced Soft Error Mechanisms in Nanoscale CMOS Combinational Logic Circuits written by Harikrushna Himatbhai Dhameliya and published by . This book was released on 2011 with total page 142 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Soft Error Mechanisms Modeling and Mitigation written by Selahattin Sayil and published by Springer. This book was released on 2016-02-25 with total page 112 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book introduces readers to various radiation soft-error mechanisms such as soft delays, radiation induced clock jitter and pulses, and single event (SE) coupling induced effects. In addition to discussing various radiation hardening techniques for combinational logic, the author also describes new mitigation strategies targeting commercial designs. Coverage includes novel soft error mitigation techniques such as the Dynamic Threshold Technique and Soft Error Filtering based on Transmission gate with varied gate and body bias. The discussion also includes modeling of SE crosstalk noise, delay and speed-up effects. Various mitigation strategies to eliminate SE coupling effects are also introduced. Coverage also includes the reliability of low power energy-efficient designs and the impact of leakage power consumption optimizations on soft error robustness. The author presents an analysis of various power optimization techniques, enabling readers to make design choices that reduce static power consumption and improve soft error reliability at the same time.
Download or read book Impact of Logic Synthesis on the Soft Error Rate of Digital Integrated Circuits written by Daniel Limbrick and published by . This book was released on 2012 with total page 101 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Noise Contamination in Nanoscale VLSI Circuits written by Selahattin Sayil and published by Springer Nature. This book was released on 2022-08-31 with total page 142 pages. Available in PDF, EPUB and Kindle. Book excerpt: This textbook provides readers with a comprehensive introduction to various noise sources that significantly reduce performance and reliability in nanometer-scale integrated circuits. The author covers different types of noise, such as crosstalk noise caused by signal switching of adjacent wires, power supply noise or IR voltage drop in the power line due to simultaneous buffer / gate switching events, substrate coupling noise, radiation-induced transients, thermally induced noise and noise due to process and environmental Coverages also includes the relationship between some of these noise sources, as well as compound effects, and modeling and mitigation of noise mechanisms.
Download or read book Soft Errors in Modern Electronic Systems written by Michael Nicolaidis and published by Springer Science & Business Media. This book was released on 2010-09-24 with total page 331 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides a comprehensive presentation of the most advanced research results and technological developments enabling understanding, qualifying and mitigating the soft errors effect in advanced electronics, including the fundamental physical mechanisms of radiation induced soft errors, the various steps that lead to a system failure, the modelling and simulation of soft error at various levels (including physical, electrical, netlist, event driven, RTL, and system level modelling and simulation), hardware fault injection, accelerated radiation testing and natural environment testing, soft error oriented test structures, process-level, device-level, cell-level, circuit-level, architectural-level, software level and system level soft error mitigation techniques. The book contains a comprehensive presentation of most recent advances on understanding, qualifying and mitigating the soft error effect in advanced electronic systems, presented by academia and industry experts in reliability, fault tolerance, EDA, processor, SoC and system design, and in particular, experts from industries that have faced the soft error impact in terms of product reliability and related business issues and were in the forefront of the countermeasures taken by these companies at multiple levels in order to mitigate the soft error effects at a cost acceptable for commercial products. In a fast moving field, where the impact on ground level electronics is very recent and its severity is steadily increasing at each new process node, impacting one after another various industry sectors (as an example, the Automotive Electronics Council comes to publish qualification requirements on soft errors), research and technology developments and industrial practices have evolve very fast, outdating the most recent books edited at 2004.
Download or read book Soft Errors written by Jean-Luc Autran and published by CRC Press. This book was released on 2017-12-19 with total page 532 pages. Available in PDF, EPUB and Kindle. Book excerpt: Soft errors are a multifaceted issue at the crossroads of applied physics and engineering sciences. Soft errors are by nature multiscale and multiphysics problems that combine not only nuclear and semiconductor physics, material sciences, circuit design, and chip architecture and operation, but also cosmic-ray physics, natural radioactivity issues, particle detection, and related instrumentation. Soft Errors: From Particles to Circuits addresses the problem of soft errors in digital integrated circuits subjected to the terrestrial natural radiation environment—one of the most important primary limits for modern digital electronic reliability. Covering the fundamentals of soft errors as well as engineering considerations and technological aspects, this robust text: Discusses the basics of the natural radiation environment, particle interactions with matter, and soft-error mechanisms Details instrumentation developments in the fields of environment characterization, particle detection, and real-time and accelerated tests Describes the latest computational developments, modeling, and simulation strategies for the soft error-rate estimation in digital circuits Explores trends for future technological nodes and emerging devices Soft Errors: From Particles to Circuits presents the state of the art of this complex subject, providing comprehensive knowledge of the complete chain of the physics of soft errors. The book makes an ideal text for introductory graduate-level courses, offers academic researchers a specialized overview, and serves as a practical guide for semiconductor industry engineers or application engineers.
Download or read book Mitigation of Thermally Induced Soft Errors in CMOS Nanoscale Circuits written by Md Sofikul Islam and published by . This book was released on 2017 with total page 212 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Radiation Induced Soft Error written by Norbert Seifert and published by Now Publishers Inc. This book was released on 2010-11 with total page 136 pages. Available in PDF, EPUB and Kindle. Book excerpt: Radiation-induced Soft Errors: A Chip-level Modeling Perspective summarizes and discusses selected publications that enable a truly chip-level radiation-induced soft error rate estimation methodology.
Download or read book A Methodology for Characterization Modeling and Mitigation of Single Event Transient Effects in CMOS Standard Combinational Cells written by Marko Andjelković and published by . This book was released on 2021 with total page 0 pages. Available in PDF, EPUB and Kindle. Book excerpt: With the downscaling of CMOS technologies, the radiation-induced Single Event Transient (SET) effects in combinational logic have become a critical reliability issue for modern integrated circuits (ICs) intended for operation under harsh radiation conditions. The SET pulses generated in combinational logic may propagate through the circuit and eventually result in soft errors. It has thus become an imperative to address the SET effects in the early phases of the radiation-hard IC design. In general, the soft error mitigation solutions should accommodate both static and dynamic measures to ensure the optimal utilization of available resources. An efficient soft-error-aware design should address synergistically three main aspects: (i) characterization and modeling of soft errors, (ii) multi-level soft error mitigation, and (iii) online soft error monitoring. Although significant results have been achieved, the effectiveness of SET characterization methods, accuracy of predictive SET models, and efficiency of SET mitigation measures are ...
Download or read book Design for Yield and Reliability for Nanometer Cmos Digital Circuits written by Mostafa Hassan and published by LAP Lambert Academic Publishing. This book was released on 2014-01 with total page 296 pages. Available in PDF, EPUB and Kindle. Book excerpt: The nano-age has already begun, where typical feature dimensions are smaller than 100nm. The operating frequency is expected to increase up to 12 GHz, and a single chip will contain over 40 billion transistors in 2020, as given by the International Technology Roadmap for Semiconductors (ITRS) initiative. ITRS also predicts that the scaling of CMOS devices and process technology, as it is known today, will become much more difficult as the industry advances towards the 16nm technology node and further. This aggressive scaling of CMOS technology has pushed the devices to their physical limits. Design goals are governed by several factors other than power, performance and area such as process variations, radiation induced soft errors, and aging degradation mechanisms. These new design challenges have a strong impact on the parametric yield and reliability of nanometer digital circuits and also result in functional yield losses in variation-sensitive digital circuits such as Static Random Access Memory (SRAM) and flip-flops.
Download or read book Logic Repair and Soft Error Rate Reduction Using Approximate Logic Functions written by Adeola Adeleke and published by . This book was released on 2012 with total page 99 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Circuit and Layout Techniques for Soft error resilient Digital CMOS Circuits written by Hsiao-Heng Kelin Lee and published by . This book was released on 2011 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: Radiation-induced soft errors are a major concern for modern digital circuits, especially memory elements. Unlike large Random Access Memories that can be protected using error-correcting codes and bit interleaving, soft error protection of sequential elements, i.e. latches and flip-flops, is challenging. Traditional techniques for designing soft-error-resilient sequential elements generally address single node errors, or Single Event Upsets (SEUs). However, with technology scaling, the charge deposited by a single particle strike can be simultaneously collected and shared by multiple circuit nodes, resulting in Single Event Multiple Upsets (SEMUs). In this work, we target SEMUs by presenting a design framework for soft-error-resilient sequential cell design with an overview of existing circuit and layout techniques for soft error mitigation, and introducing a new soft error resilience layout design principle called LEAP, or Layout Design through Error-Aware Transistor Positioning. We then discuss our application of LEAP to the SEU-immune Dual Interlocked Storage Cell (DICE) by implementing a new sequential element layout called LEAP-DICE, retaining the original DICE circuit topology. We compare the soft error performance of SEU-immune flip-flops with the LEAP-DICE flip-flop using a test chip in 180nm CMOS under 200-MeV proton radiation and conclude that 1) our LEAP-DICE flip-flop encounters on average 2,000X and 5X fewer errors compared to a conventional D flip-flop and our reference DICE flip-flop, respectively; 2) our LEAP-DICE flip-flop has the best soft error performance among all existing SEU-immune flip-flops; 3) In the evaluation of our design framework, we also discovered new soft error effects related to operating conditions such as voltage scaling, clock frequency setting and radiation dose.
Download or read book Radiation Hardened by Design Methodologies for Soft error Mitigated Digital Architectures written by Chandarasekaran Ramamurthy and published by . This book was released on 2017 with total page 0 pages. Available in PDF, EPUB and Kindle. Book excerpt: Digital architectures for data encryption, processing, clock synthesis, data transfer, etc. are susceptible to radiation induced soft errors due to charge collection in complementary metal oxide semiconductor (CMOS) integrated circuits (ICs). Radiation hardening by design (RHBD) techniques such as double modular redundancy (DMR) and triple modular redundancy (TMR) are used for error detection and correction respectively in such architectures. Multiple node charge collection (MNCC) causes domain crossing errors (DCE) which can render the redundancy ineffectual. This dissertation describes techniques to ensure DCE mitigation with statistical confidence for various designs. Both sequential and combinatorial logic are separated using these custom and computer aided design (CAD) methodologies. Radiation vulnerability and design overhead are studied on VLSI sub-systems including an advanced encryption standard (AES) which is DCE mitigated using module level coarse separation on a 90-nm process with 99.999% DCE mitigation. A radiation hardened microprocessor (HERMES2) is implemented in both 90-nm and 55-nm technologies with an interleaved separation methodology with 99.99% DCE mitigation while achieving 4.9% increased cell density, 28.5 % reduced routing and 5.6% reduced power dissipation over the module fences implementation. A DMR register-file (RF) is implemented in 55 nm process and used in the HERMES2 microprocessor. The RF array custom design and the decoders APR designed are explored with a focus on design cycle time. Quality of results (QOR) is studied from power, performance, area and reliability (PPAR) perspective to ascertain the improvement over other design techniques. A radiation hardened all-digital multiplying pulsed digital delay line (DDL) is designed for double data rate (DDR2/3) applications for data eye centering during high speed off-chip data transfer. The effect of noise, radiation particle strikes and statistical variation on the designed DDL are studied in detail. The design achieves the best in class 22.4 ps peak-to-peak jitter, 100-850 MHz range at 14 pJ/cycle energy consumption. Vulnerability of the non-hardened design is characterized and portions of the redundant DDL are separated in custom and auto-place and route (APR). Thus, a range of designs for mission critical applications are implemented using methodologies proposed in this work and their potential PPAR benefits explored in detail.
Download or read book Dependable Multicore Architectures at Nanoscale written by Marco Ottavi and published by Springer. This book was released on 2017-08-28 with total page 294 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides comprehensive coverage of the dependability challenges in today's advanced computing systems. It is an in-depth discussion of all the technological and design-level techniques that may be used to overcome these issues and analyzes various dependability-assessment methods. The impact of individual application scenarios on the definition of challenges and solutions is considered so that the designer can clearly assess the problems and adjust the solution based on the specifications in question. The book is composed of three sections, beginning with an introduction to current dependability challenges arising in complex computing systems implemented with nanoscale technologies, and of the effect of the application scenario. The second section details all the fault-tolerance techniques that are applicable in the manufacture of reliable advanced computing devices. Different levels, from technology-level fault avoidance to the use of error correcting codes and system-level checkpointing are introduced and explained as applicable to the different application scenario requirements. Finally the third section proposes a roadmap of future trends in and perspectives on the dependability and manufacturability of advanced computing systems from the special point of view of industrial stakeholders. Dependable Multicore Architectures at Nanoscale showcases the original ideas and concepts introduced into the field of nanoscale manufacturing and systems reliability over nearly four years of work within COST Action IC1103 MEDIAN, a think-tank with participants from 27 countries. Academic researchers and graduate students working in multi-core computer systems and their manufacture will find this book of interest as will industrial design and manufacturing engineers working in VLSI companies.
Download or read book Analysis and Design of Resilient VLSI Circuits written by Rajesh Garg and published by Springer Science & Business Media. This book was released on 2009-10-22 with total page 224 pages. Available in PDF, EPUB and Kindle. Book excerpt: This monograph is motivated by the challenges faced in designing reliable VLSI systems in modern VLSI processes. The reliable operation of integrated circuits (ICs) has become increasingly dif?cult to achieve in the deep submicron (DSM) era. With continuouslydecreasing device feature sizes, combinedwith lower supply voltages and higher operating frequencies, the noise immunity of VLSI circuits is decreasing alarmingly. Thus, VLSI circuits are becoming more vulnerable to noise effects such as crosstalk, power supply variations, and radiation-inducedsoft errors. Among these noise sources, soft errors(or error caused by radiation particle strikes) have become an increasingly troublesome issue for memory arrays as well as c- binational logic circuits. Also, in the DSM era, process variations are increasing at a signi?cant rate, making it more dif?cult to design reliable VLSI circuits. Hence, it is important to ef?ciently design robust VLSI circuits that are resilient to radiation particle strikes and process variations. The work presented in this research mo- graph presents several analysis and design techniques with the goal of realizing VLSI circuits, which are radiation and process variation tolerant.
Download or read book Machine Learning for Cyber Security written by Xiaofeng Chen and published by Springer Nature. This book was released on 2020-11-10 with total page 623 pages. Available in PDF, EPUB and Kindle. Book excerpt: This three volume book set constitutes the proceedings of the Third International Conference on Machine Learning for Cyber Security, ML4CS 2020, held in Xi’an, China in October 2020. The 118 full papers and 40 short papers presented were carefully reviewed and selected from 360 submissions. The papers offer a wide range of the following subjects: Machine learning, security, privacy-preserving, cyber security, Adversarial machine Learning, Malware detection and analysis, Data mining, and Artificial Intelligence.
Download or read book CMOS Electronics written by Jaume Segura and published by John Wiley & Sons. This book was released on 2004-03-26 with total page 370 pages. Available in PDF, EPUB and Kindle. Book excerpt: CMOS manufacturing environments are surrounded with symptoms that can indicate serious test, design, or reliability problems, which, in turn, can affect the financial as well as the engineering bottom line. This book educates readers, including non-engineers involved in CMOS manufacture, to identify and remedy these causes. This book instills the electronic knowledge that affects not just design but other important areas of manufacturing such as test, reliability, failure analysis, yield-quality issues, and problems. Designed specifically for the many non-electronic engineers employed in the semiconductor industry who need to reliably manufacture chips at a high rate in large quantities, this is a practical guide to how CMOS electronics work, how failures occur, and how to diagnose and avoid them. Key features: Builds a grasp of the basic electronics of CMOS integrated circuits and then leads the reader further to understand the mechanisms of failure. Unique descriptions of circuit failure mechanisms, some found previously only in research papers and others new to this publication. Targeted to the CMOS industry (or students headed there) and not a generic introduction to the broader field of electronics. Examples, exercises, and problems are provided to support the self-instruction of the reader.
