Download or read book Process Study of Higher k Gate Dielectric and Si Ge Channel in MOS Devices written by 傅崇豪 and published by . This book was released on 2014 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book SiGe Ge and Related Compounds 3 Materials Processing and Devices written by David Harame and published by The Electrochemical Society. This book was released on 2008 with total page 1136 pages. Available in PDF, EPUB and Kindle. Book excerpt: Advanced semiconductor technology is depending on innovation and less on "classical" scaling. SiGe, Ge, and Related Compounds have become a key component of the arsenal in improving semiconductor performance. This issue of ECS Transactions discusses the technology to form these materials, process them, FET devices incorporating them, Surfaces and Interfaces, Optoelectronic devices, and HBT devices.
Download or read book Interface engineered Ge MOSFETs for Future High Performance CMOS Applications written by Duygu Kuzum and published by Stanford University. This book was released on 2009 with total page 159 pages. Available in PDF, EPUB and Kindle. Book excerpt: As the semiconductor industry approaches the limits of traditional silicon CMOS scaling, introduction of performance boosters like novel materials and innovative device structures has become necessary for the future of CMOS. High mobility materials are being considered to replace Si in the channel to achieve higher drive currents and switching speeds. Ge has particularly become of great interest as a channel material, owing to its high bulk hole and electron mobilities. However, replacement of Si channel by Ge requires several critical issues to be addressed in Ge MOS technology. High quality gate dielectric for surface passivation, low parasitic source/drain resistance and performance improvement in Ge NMOS are among the major challenges in realizing Ge CMOS. Detailed characterization of gate dielectric/channel interface and a deeper understanding of mobility degradation mechanisms are needed to address the Ge NMOS performance problem and to improve PMOS performance. In the first part of this dissertation, the electrical characterization results on Ge NMOS and PMOS devices fabricated with GeON gate dielectric are presented. Carrier scattering mechanisms are studied through low temperature mobility measurements. For the first time, the effect of substrate crystallographic orientation on inversion electron and hole mobilities is investigated. Direct formation of a high-k dielectric on Ge has not given good results in the past. A good quality interface layer is required before the deposition of a high-K dielectric. In the second part of this dissertation, ozone-oxidation process is introduced to engineer Ge/insulator interface. Electrical and structural characterizations and stability analysis are carried out and high quality Ge/dielectric interface with low interface trap density is demonstrated. Detailed extraction of interface trap density distribution across the bandgap and close to band edges of Ge, using low temperature conductance and capacitance measurements is presented. Ge N-MOSFETs have exhibited poor drive currents and low mobility, as reported by several different research groups worldwide. In spite of the increasing interest in Ge, the major mechanisms behind poor Ge NMOS performance have not been completely understood yet. In the last part of this dissertation, the results on Ge NMOS devices fabricated with the ozone-oxidation and the low temperature source/drain activation processes are discussed. These devices achieve the highest electron mobility to-date, about 1.5 times the universal Si mobility. Detailed interface characterizations, trapping analyses and gated Hall device measurements are performed to identify the mechanisms behind poor Ge NMOS performance in the past.
Download or read book SiGe materials Processing and Devices written by David Louis Harame and published by The Electrochemical Society. This book was released on 2004 with total page 1242 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Physics and Technology of High k Gate Dielectrics 6 written by S. Kar and published by The Electrochemical Society. This book was released on 2008-10 with total page 550 pages. Available in PDF, EPUB and Kindle. Book excerpt: The issue covers in detail all aspects of the physics and the technology of high dielectric constant gate stacks, including high mobility substrates, novel and still higher permittivity dielectric materials, CMOS processing with high-K layers, metals for gate electrodes, interface issues, physical, chemical, and electrical characterization, gate stack reliability, and DRAM and non-volatile memories.
Download or read book Atomic Layer Deposited Beryllium Oxide as a Gate Dielectric Or Interfacial Layer for Si and III V MOS Devices written by Jung Hwan Yum and published by . This book was released on 2012 with total page 226 pages. Available in PDF, EPUB and Kindle. Book excerpt: The continuous improvement in the semiconductor industry has been successfully achieved by the reducing dimensions of CMOS (complementary metal oxide semiconductor) technology. For the last four decades, the scaling down of physical thickness of SiO2 gate dielectrics has improved the speed of output drive current by shrinking of transistor area in front-end-process of integrated circuits. A higher number of transistors on chip resulting in faster speed and lower cost can be allowable by the scaling down and these fruitful achievements have been mainly made by the thinning thickness of one key component - Gate Dielectric - at Si based MOSFET (metal-oxide-semiconductor field effect transistor) devices. So far, SiO2 (silicon dioxide) gate dielectric having the excellent material and electrical properties such as good interface (i.e., Dit ~ 2x1010 eV−1cm−2), low gate leakage current, higher dielectric breakdown immunity (≥10MV/cm) and excellent thermal stability at typical Si processing temperature has been popularly used as the leading gate oxide material. The next generation Si based MOSFETs will require more aggressive gate oxide scaling to meet the required specifications. Since high-k dielectrics provide the same capacitance with a thicker film, the leakage current reduction, therefore, less the standby power consumption is one of the huge advantages. Also, it is easier to fabricate during the process because the control of film thickness is still not in the critical range compared to the same leakage current characteristic of SiO2 film. HfO2 based gate dielectric is considered as the most promising candidate among materials being studied since it shows good characteristics with conventional Si technology and good device performance has been reported. However, it has still many problems like insufficient thermals stability on silicon such as low crystallization temperature, low k interfacial regrowth, charge trapping and so on. The integration of hafnium based high-k dielectric into CMOS technology is also limited by major issues such as degraded channel mobility and charge trapping. One approach to overcome these obstacles is using alternative substrate materials such as SiGe, GaAs, InGaAs, and InP to improve channel mobility. High electron mobility in the III-V materials has attracted significant attention for a possible application as a channel material in metal/oxide/semiconductor (MOS) transistors. One of the main challenges is that III-V MOSFETs generally lack thermodynamically stable insulators of high electrical quality, which would passivate the interface states at the dielectric/substrate interface and unpin the Fermi level. To address this issue, various dielectric, such as Si/SiO2, Ge, SiGe, SiN and Al2O3, were considered as an interface passivation layer (IPL). Atomic Layer Deposited (ALD) Al2O3 has demonstrated superior IPL characteristics compared to the other candidates due to its high dielectric constant and interface quality. However, defect density in Al2O3 is still too high even as several cleaning methods such as NH4OH, (NH4)2S and F treatment have been developed, which limits the performance of III-V MOSFETs. In the first part of this study, theoretical approaches to understand the motivation and requirements as an high-k gate dielectric or interfacial layer, and properties of ALD beryllium oxide (BeO) for Si and III-V MOS devices have been investigated. The second part of this study focuses on the precursor synthesis and fundamental material characterization of ALD BeO thin film using physical, optical and electrical analysis. Film properties such as self-cleaning reaction and oxygen diffusion barrier will be presented. At the third part, depletion mode transistor and self-aligned MOSFETs using ALD BeO on Si and InP high mobility substrates have been investigated. And as for the final part of this study, the density functional theory of Be(CH3)2 precursor, electromagnetics, and thermodynamics were investigated to understand the reaction mechanism and self-cleaning reaction, and to evaluate the gate dielectrics such as Al2O3, BeO, SiO2, and HfO2.
Download or read book High k Gate Dielectric Materials written by Niladri Pratap Maity and published by CRC Press. This book was released on 2020-12-18 with total page 246 pages. Available in PDF, EPUB and Kindle. Book excerpt: This volume explores and addresses the challenges of high-k gate dielectric materials, one of the major concerns in the evolving semiconductor industry and the International Technology Roadmap for Semiconductors (ITRS). The application of high-k gate dielectric materials is a promising strategy that allows further miniaturization of microelectronic components. This book presents a broad review of SiO2 materials, including a brief historical note of Moore’s law, followed by reliability issues of the SiO2 based MOS transistor. It goes on to discuss the transition of gate dielectrics with an EOT ~ 1 nm and a selection of high-k materials. A review of the various deposition techniques of different high-k films is also discussed. High-k dielectrics theories (quantum tunneling effects and interface engineering theory) and applications of different novel MOSFET structures, like tunneling FET, are also covered in this book. The volume also looks at the important issues in the future of CMOS technology and presents an analysis of interface charge densities with the high-k material tantalum pentoxide. The issue of CMOS VLSI technology with the high-k gate dielectric materials is covered as is the advanced MOSFET structure, with its working structure and modeling. This timely volume will prove to be a valuable resource on both the fundamentals and the successful integration of high-k dielectric materials in future IC technology.
Download or read book SiGe Ge and Related Compounds 4 Materials Processing and Devices written by D. Harame and published by The Electrochemical Society. This book was released on 2010-10 with total page 1066 pages. Available in PDF, EPUB and Kindle. Book excerpt: Advanced semiconductor technology is depending on innovation and less on "classical" scaling. SiGe, Ge, and Related Compounds has become a key component in the arsenal in improving semiconductor performance. This symposium discusses the technology to form these materials, process them, FET devices incorporating them, Surfaces and Interfaces, Optoelectronic devices, and HBT devices.
Download or read book SiGe and Ge written by David Louis Harame and published by The Electrochemical Society. This book was released on 2006 with total page 1280 pages. Available in PDF, EPUB and Kindle. Book excerpt: The second International SiGe & Ge: Materials, Processing, and Devices Symposium was part of the 2006 ECS conference held in Cancun, Mexico from October 29-Nov 3, 2006. This meeting provided a forum for reviewing and discussing all materials and device related aspects of SiGe & Ge. The hardcover edition includes a bonus CD-ROM containing the PDF of the entire issue.
Download or read book Advanced Gate Stacks for High Mobility Semiconductors written by Athanasios Dimoulas and published by Springer Science & Business Media. This book was released on 2008-01-01 with total page 397 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides a comprehensive monograph on gate stacks in semiconductor technology. It covers the major latest developments and basics and will be useful as a reference work for researchers, engineers and graduate students alike. The reader will get a clear view of what has been done so far, what is the state-of-the-art and which are the main challenges ahead before we come any closer to a viable Ge and III-V MOS technology.
Download or read book High k Gate Dielectrics for CMOS Technology written by Gang He and published by John Wiley & Sons. This book was released on 2012-08-10 with total page 560 pages. Available in PDF, EPUB and Kindle. Book excerpt: A state-of-the-art overview of high-k dielectric materials for advanced field-effect transistors, from both a fundamental and a technological viewpoint, summarizing the latest research results and development solutions. As such, the book clearly discusses the advantages of these materials over conventional materials and also addresses the issues that accompany their integration into existing production technologies. Aimed at academia and industry alike, this monograph combines introductory parts for newcomers to the field as well as advanced sections with directly applicable solutions for experienced researchers and developers in materials science, physics and electrical engineering.
Download or read book Advanced Gate Stack Source drain and Channel Engineering for Si based CMOS 2 written by Fred Roozeboom and published by The Electrochemical Society. This book was released on 2006 with total page 472 pages. Available in PDF, EPUB and Kindle. Book excerpt: These proceedings describe processing, materials, and equipment for CMOS front-end integration including gate stack, source/drain and channel engineering. Topics: strained Si/SiGe and Si/SiGe on insulator; high-mobility channels including III-V¿s, etc.; nanowires and carbon nanotubes; high-k dielectrics, metal and FUSI gate electrodes; doping/annealing for ultra-shallow junctions; low-resistivity contacts; advanced deposition (e.g. ALD, CVD, MBE), RTP, UV, plasma and laser-assisted processes.
Download or read book Process Integration and Performance Evaluation of Ge based Quantum Well Channel MOSFETs for Sub 22nm Node Digital CMOS Logic Technology written by Se-Hoon Lee and published by . This book was released on 2011 with total page 320 pages. Available in PDF, EPUB and Kindle. Book excerpt: Since metal-oxide-semiconductor (MOS) device was first reported around 1959 and utilized for integrated circuits in 1961, complementary MOS technology has become the mainstream of semiconductor industry. Its performance has been improved based on scaling of dimensions of MOS field-effect-transistors (MOSFET) in accordance with Moore's law, which states that the density of MOSFETs due to scaling approximately doubles every two years. Entering into sub-100nm regime caused a lot of challenges. Traditional way of scaling no longer provided performance enhancement of individual MOSFETs. Increased channel doping which is required to prevent degradation of device electrostatics from short channel effects caused carrier mobility degradation. New inventions needed to be incorporated to sustain performance enhancement trend with scaling. Implementation of process induced strained Si technology allowed mobility enhancement, and high-K/metal gate instead of conventional poly-Si/SiO2 allowed continuing electrical gate oxide thickness scaling, hence extending the life span of Moore's law. As we are now moving toward 22nm logic technology and below, new concerns have been rapidly aroused. Controlling power consumption and performance variability are becoming as important as developing scaled devices with enhanced performance. Expandability of strained-Si channel technology via process induced strain also faces increasing complexity from ever tighter gate pitch and difficulties in controlling defect level with the channel stress enhancement techniques. At the same time, long-lasting planar MOSFET architecture also faces serious challenges due to the limits of controlling short channel effects. New paradigms and pathways for future technology seems to be required. As a result, new material sets, new device architectures and concepts are being vigorously explored in the literature. These new trends can be categorized into three groups: MOSFET structure with (non-Si) high mobility channel materials, advanced (non-planar) MOSFET structures, and MOSFET-type structures with new device operation concepts such as tunneling FETs. This dissertation presents research on high mobility channel MOSFET structures (planar and non-planar) using group IV material (mainly SiGe) for enhanced performance and reduced operating power. This work especially focuses on improving the performance of short channel device performance of SiGe channel pMOSFETs which has long been researched yet clearly demonstrated in literature only recently. To reach the goal, novel processing technologies such as millisecond flash source/drain anneal and high pressure hydrogen post-metal anneal are explored. Finally, performance dependence on channel and substrate direction has been analyzed to find the optimal use of these SiGe channels. This work describes an exciting opportunity of weighting the possibility of using high mobility channel MOSFETs for future logic technology.
Download or read book Advanced Gate Stack Source Drain and Channel Engineering for Si Based CMOS 4 New Materials Processes and Equipment written by P. J. Timans and published by The Electrochemical Society. This book was released on 2008-05 with total page 488 pages. Available in PDF, EPUB and Kindle. Book excerpt: This issue describes processing, materials and equipment for CMOS front-end integration including gate stack, source/drain and channel engineering. Topics: strained Si/SiGe and Si/SiGe on insulator; high-mobility channels including III-V¿s, etc.; nanowires and carbon nanotubes; high-k dielectrics, metal and FUSI gate electrodes; doping/annealing for ultra-shallow junctions; low-resistivity contacts; advanced deposition (e.g. ALD, CVD, MBE), RTP, UV, plasma and laser-assisted processes.
Download or read book Advanced Gate Stack Source Drain and Channel Engineering for Si Based CMOS 6 New Materials Processes and Equipment written by E. P. Gusev and published by The Electrochemical Society. This book was released on 2010-04 with total page 426 pages. Available in PDF, EPUB and Kindle. Book excerpt: These proceedings describe processing, materials and equipment for CMOS front-end integration including gate stack, source/drain and channel engineering. Topics: strained Si/SiGe and Si/SiGe on insulator; high-mobility channels including III-V¿s, etc.; nanowires and carbon nanotubes; high-k dielectrics, metal and FUSI gate electrodes; doping/annealing for ultra-shallow junctions; low-resistivity contacts; advanced deposition (e.g. ALD, CVD, MBE), RTP, UV, plasma and laser-assisted processes.
Download or read book Surface Potential of Dual Material Gate MOSFET with High k Dielectrics written by Swapnadip De and published by LAP Lambert Academic Publishing. This book was released on 2013 with total page 64 pages. Available in PDF, EPUB and Kindle. Book excerpt: The shrinking of device dimension leads to reduction of gate oxide thickness. As a result of this the undesirable hot electron effect and the gate tunneling current is increased. In order to overcome this drawback high-k materials are used instead of silicon dioxide as the insulating material underneath the gate. High-k dielectrics are used in semiconductor manufacturing processes where they are usually used to replace a silicon dioxide gate dielectric.Among various high-k materials, Hafnium oxide (HfO2), Tantalum pent oxide (Ta2O5) these materials appear to be the candidates for replacing silicon oxide. These high-k dielectrics exhibit a trend of decreasing barrier height with increasing dielectric constant.The high-k materials with far higher permittivity create same gate capacitance for thicker dielectric. In this book the main focus has been on the modeling and the influence of depletion layers around the source and the drain regions on the sub threshold surface potential of a short-channel DMG MOS transistor with a uniformly-doped channel.
Download or read book Advanced Gate Stack Source Drain and Channel Engineering for Si Based CMOS 5 New Materials Processes and Equipment written by V. Narayanan and published by The Electrochemical Society. This book was released on 2009-05 with total page 367 pages. Available in PDF, EPUB and Kindle. Book excerpt: This issue of ¿ECS Transactions¿ describes processing, materials and equipment for CMOS front-end integration including gate stack, source/drain and channel engineering. Topics include strained Si/SiGe and Si/SiGe on insulator; high-mobility channels including III-V¿s, etc.; nanowires and carbon nanotubes; high-k dielectrics, metal and FUSI gate electrodes; doping/annealing for ultra-shallow junctions; low-resistivity contacts; advanced deposition (e.g. ALD, CVD, MBE), RTP, UV, plasma and laser-assisted processes.
