Download or read book Multiple Fault Diagnosis in Combinational Networks written by Charles Wei-Yuan Cha and published by . This book was released on 1974 with total page 114 pages. Available in PDF, EPUB and Kindle. Book excerpt: A new concept, the prime fault, is introduced for the study of multiple fault diagnosis in combinational logic networks. It is shown that every multiple fault in a network can be represented by a functionally equivalent fault with prime faults as its only components. The use of prime faults greatly simplifies multiple fault analysis and test generation.

Download or read book Multiple Fault Detection in combinational networks written by J. W. Gault and published by . This book was released on 1969 with total page 52 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Multiple Fault Detection in Combinational Circuits written by Min-Wen Du and published by . This book was released on 1972 with total page 198 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Multiple Fault Detection for Combinational Circuits written by Gholam-Reza Fadakar and published by . This book was released on 1979 with total page 118 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Multiple Fault Detection in Combinational Circuits written by Sivanarayana Mallela and published by . This book was released on 1976 with total page 128 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Automated Multiple Fault Test Generation for Combinational Networks written by Robert A. Hendrix and published by . This book was released on 1976 with total page 156 pages. Available in PDF, EPUB and Kindle. Book excerpt: This report deals with multiple fault detection in combinational logic networks; the faults considered are those which may be represented by one or more lines stuck at logic value 0 or 1. Some new theorems and rules are presented which aid in the identification of masking faults, and an algorithm is developed which produces multiple fault detection test sets for single-output combinational logic networks. The algorithm uses a path sensitizing technique to generate tests for members of a set of prime faults; any network fault can be represented by a combination of faults from the prime fault set, and a test which detects all combinations of prime faults will detect any single or multiple fault in the network. A modified version of the algorithm is implemented in the FORTRAN computer programming language; the automated version produces test sets which are optimal or near-optimal and usually complete. In the test generation process, certain redundancies are also detected.

Download or read book Multiple Faults in Combinational Logic written by H. G. Shah and published by . This book was released on 1973 with total page 72 pages. Available in PDF, EPUB and Kindle. Book excerpt: The problem of multiple fault detection in combinational logic network is addressed. A number of test set generation procedures are discussed. A couple of methods to reduce number of faults to be considered in test generation procedures are also discussed. The later approaches study topological aspects of networks. An EXCLUSIVE-OR method is developed which yields a general Boolean expression implying the complete test set for any specified multiple fault. This method is compared with other similar approaches appearing in recent literature. (Author).

Download or read book Test generation and fault diagnosis for multiple faults in combinational circuits written by Stanford University. Computer Systems Laboratory and published by . This book was released on 1983 with total page 52 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Multiple Fault Detection in Combinational Network Topologies written by Carlos E. Tobon and published by . This book was released on 1989 with total page 488 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Multiple Fault Detection in Tree structured Combinational Networks written by University of Minnesota. Computer Science Dept and published by . This book was released on 1989 with total page 20 pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: "It is shown that for a tree of cells for which the fault-free tree cannot produce all combinations at the output of each cell, there is only the trivial test set for multiple faults. It is also shown that a tree-structured design of the parallel carry lookahead adder only has the trivial test set for multiple faults, based on the fact that the cells in the tree cannot generate a fault-free output (1,1). Also, a formula is given for a multiple fault detection test set for the parallel carry lookahead adder under the assumption that the faulty parallel adder cannot generate a faulty output (1,1) at any of its processors."

Download or read book Fault Diagnosis of Multiple Output Combinational Logic Networks written by Heramb Singh and published by . This book was released on 1971 with total page 168 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book A General Algorithm for the Realization of Multiple Fault Detectable Networks written by John Lawrence Taska and published by . This book was released on 1973 with total page 134 pages. Available in PDF, EPUB and Kindle. Book excerpt: The study of fault diagnosis of digital systems has been steadily gathering momentum for the past decade. Recently there have been several successful attempts to identify and characterize diagnostically desirable structures which may be worked into the system during the design phase. Of particular interest are the system design rules developed by Schertz and Metze for the generation of combinational networks with desirable diagnostic qualities. These design rules call for the system to be designed using particular structural blocks called restrictive fanout-free networks. The most general form of such a network is called an extended cascade. Networks designed in such a manner have the important property that any complete single fault test set (CSFTS) will necessarily detect all possible multiple faults which may occur. It is the purpose of this report to present a heuristic for the realization of single and multiple output extended cascade networks together with an algorithm for the generation of a CSFTS for these networks that is also a complete multiple fault test set (CMFTS).

Download or read book Comprehensive Fault Diagnosis of Combinational Circuits written by David B. Lavo and published by . This book was released on 2002 with total page 278 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Functional Method for Multiple Fault Detection and Location in Combinational Circuits written by Ka Ngow Wong and published by . This book was released on 1974 with total page 124 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Symmetrical Algorithm for Multiple Fault Detection in Parallel serial Combinational Networks written by Carlos E. Tobon and published by . This book was released on 1988* with total page 90 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Testing for multiple intermittent failures in combinational circuits by maximizing the probability of fault detection written by Stanford University Stanford Electronics Laboratories. Digital Systems Laboratory and published by . This book was released on 1977 with total page 36 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book On the Design of Diagnosable Combinational Networks written by Michael Reid Paige and published by . This book was released on 1971 with total page 274 pages. Available in PDF, EPUB and Kindle. Book excerpt: A vector notation for the generation of fault detection tests from the functional description of a logic network is introduced. It is shown that it is possible to treat the fault behavior and diagnosis of the basic gate types (AND, OR, NAND, NOR) in a uniform manner and to extend this approach to two-level designs. The formulation of a design criterion to simplify the fault detection problem in multi-level logic networks is studied. The simplification sought is two-fold: The network should be a priori completely diagnosable, that is, all single and multiple faults can be detected; All the information pertaining to the diagnosis of the network can be obtained from the functional description of the element. It is shown that the criterion of network irredundancy satisfies the above requirements, while being a reasonable design tool. The use of a higher-level system design language for the specification of digital networks is examined. Some general properties which are desirable in such a system to enhance the diagnosability of the resulting design are discussed. A method for translating a design description into diagnosable hardware is presented. (Author).