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Book Design and Development of Material based Resolution Enhancement Techniques for Optical Lithography

Download or read book Design and Development of Material based Resolution Enhancement Techniques for Optical Lithography written by Xinyu Gu and published by . This book was released on 2011 with total page 552 pages. Available in PDF, EPUB and Kindle. Book excerpt: The relentless commercial drive for smaller, faster, and cheaper semi-conductor devices has pushed the existing patterning technologies to their limits. Photolithography, one of the crucial processes that determine the feature size in a microchip, is currently facing this challenge. The immaturity of next generation lithography (NGL) technology, particularly EUV, forces the semiconductor industry to explore new processing technologies that can extend the use of the existing lithographic method (i.e. ArF lithography) to enable production beyond the 32 nm node. Two new resolution enhancement techniques, double exposure lithography (DEL) and pitch division lithography (PDL), were proposed that could extend the resolution capability of the current lithography tools. This thesis describes the material and process development for these two techniques. DEL technique requires two exposure passes in a single lithographic cycle. The first exposure is performed with a mask that has a relaxed pitch, and the mask is then shifted by half pitch and re-used for the second exposure. The resolution of the resulting pattern on the wafer is doubled with respect to the features on the mask. This technique can be enabled with a type of material that functions as optical threshold layer (OTL). The key requirements for materials to be useful for OTL are a photoinduced isothermal phase transition and permeance modulation with reverse capabilities. A number of materials were designed and tested based on long alkyl side chain crystalline polymers that bear azobenzene pendant groups on the main chain. The target copolymers were synthesized and fully characterized. A proof-of-concept for the OTL design was successfully demonstrated with a series of customized analytical techniques. PDL technique doubles the line density of a grating mask with only a single exposure and is fully compatible with current lithography tools. Thus, this technique is capable of extending the resolution limit of the current ArF lithography without increasing the cost-of-ownership. Pitch division with a single exposure is accomplished by a dual-tone photoresist. This thesis presents a novel method to enable a dual-tone behavior by addition of a photobase generator (PBG) into a conventional resist formulation. The PBG was optimized to function as an exposure-dependent base quencher, which mainly neutralizes the acid generated in high dose regions but has only a minor influence in low dose regions. The resulting acid concentration profile is a parabola-like function of exposure dose, and only the medium exposure dose produces a sufficient amount of acid to switch the resist solubility. This acid response is exploited to produce pitch division patterns by creating a set of negative-tone lines in the overexposed regions in addition to the conventional positive-tone lines. A number of PBGs were synthesized and characterized, and their decomposition rate constants were studied using various techniques. Simulations were carried out to assess the feasibility of pitch division lithography. It was concluded that pitch division lithography is advantageous when the process aggressiveness factor k1 is below 0.27. Finally, lithography evaluations of these dual-tone resists demonstrated a proof-of-concept for pitch division lithography with 45 nm pitch divided line and space patterns for a k1 of 0.13.

Book Resolution Enhancement Techniques in Optical Lithography

Download or read book Resolution Enhancement Techniques in Optical Lithography written by Alfred Kwok-Kit Wong and published by SPIE Press. This book was released on 2001 with total page 238 pages. Available in PDF, EPUB and Kindle. Book excerpt: Ever-smaller IC devices are pushing the optical lithography envelope, increasing the importance of resolution enhancement techniques. This tutorial encompasses two decades of research. It discusses theoretical and practical aspects of commonly used techniques, including optical imaging and resolution, modified illumination, optical proximity correction, alternating and attenuating phase-shifting masks, selecting RETs, and second-generation RETs. Useful for students and practicing lithographers

Book Optimization of Resolution Enhancement Techniques in Optical Lithography

Download or read book Optimization of Resolution Enhancement Techniques in Optical Lithography written by and published by . This book was released on 2009 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: As todays' semiconductor fabrication industry tries to keep up with Moore's Law, which predicts the downscaling of integrated circuit size and the doubling of transistor counts every two years, resolution enhancement techniques (RET) play a much more important role than anytime in the past. Optical proximity correction (OPC), phase shifting mask (PSM), and off-axis illumination (OAI) are RETs used extensively in the semiconductor industry to improve the resolution and pattern fidelity of optical lithography. Preserving the fidelity of the circuit patterns is important for preserving the performance predicted in the design stage of the integrated circuit (IC). Typical circuit patterns exhibit regular geometries, such as lines, L-joint, U-joint and so on. These regular geometries reduce the resistances between nodes and simplify the process of routing. In the past decades, a variety of OPC, PSM and illumination design approaches have been proposed in the literature. In general, these approaches are divided into two subsets: rule-based and model-based approaches. This dissertation focuses on the study and development of model-based OPC, PSM and illumination optimization approaches for both coherent imaging systems and partially coherent imaging systems. For coherent imaging systems, we develop generalized gradient-based RET optimization methods to solve for the inverse lithography problem, where the search space is not constrained to a finite phase tessellation but where arbitrary search trajectories in the complex space are allowed. Subsequent mask quantization leads to efficient design of PSMs having an arbitrary number of discrete phases. In order to influence the solution patterns to have more desirable manufacturability properties, a wavelet regularization framework is introduced offering more localized flexibility than total-variation regularization methods traditionally employed in inverse problems. The algorithms provide highly effective four-phase PSMs capable of generating mask patterns with arbitrary Manhattan geometries. Furthermore, a double-patterning optimization method for generalized inverse lithography is developed where each patterning uses an optimized two-phase mask. These algorithms are computationally efficient, however, they focused on coherent illumination systems. Most practical illumination sources have a nonzero line width and their radiation is more generally described as partially coherent. Partially coherent illumination (PCI) is desired, since it can improve the theoretical resolution limit. PCI is thus introduced in practice through modified illumination sources having large coherent factors or through off-axis illumination. In partially coherent imaging, the mask is illuminated by light travelling in various directions. The source points giving rise to these incident rays are incoherent with one another, such that there is no interference that could lead to nonuniform light intensity impinging on the mask. The gradient-based inverse lithography optimization methods derived under the coherent illumination assumption fail to account for the nonlinearities of partially coherent illumination and thus perform poorly in the partially coherent scenario. For partially coherent imaging systems with inherent nonlinearities, the sum of coherent systems (SOCS) model and the average coherent approximation model are applied to develop effective and computationally efficient OPC optimization algorithms for inverse lithography. Wavelet regularization is added to the optimization framework to reduce the complexity of the optimized masks. Subsequently, a Singular Value Decomposition (SVD) model is used to develop computationally efficient PSM optimization algorithms for inverse lithography. A novel DCT post-processing is proposed to cut off the high frequency components in the optimized PSMs and keep the fabricating simplicity. Furthermore, a photoresist tone reversing technique is exploited in the design of PSMs to project extremely sparse patterns. As traditional RETs, the above mentioned gradient-based inverse OPC and PSM optimization methods fix the source thus limiting the degrees of freedom during the optimization of the mask patterns. To overcome this restriction, computationally efficient, pixel-based, simultaneous source mask optimization (SMO) methods for both OPC and PSM designs are developed in this dissertation. The synergy is exploited in the joint optimization of source and mask patterns. The resulting source and mask patterns fall well outside the realm of known design forms. In these SMO algorithms, the Fourier series expansion model is applied to approximate the partially coherent system as a sum of coherent systems. Cost sensitivity is used to drive the output pattern error in the descent direction. In order to influence the solution patterns to have more desirable manufacturability properties, topological constraints are added to the optimization framework. Several illustrative simulations are presented to demonstrate the effectiveness of the proposed algorithms. The above gradient-based inverse lithography optimization approaches are effective and computationally efficient under the thin-mask assumption, where the mask is considered as a 2-D object. As the critical dimension (CD) printed on the wafer shrinks into the subwavelength regime, the thick-mask effects become prevalent and thus these effects must be taken into account. Thus, OPC and PSM methods derived under the thin-mask assumption have the inherent limitations and perform poorly in the subwavelength scenario. In order to overcome this limitation, the final contribution of this dissertation focuses on developing OPC and PSM optimization methods based on the boundary layer (BL) model to take into account the thick-mask effects. Attributed to the nonlinear properties of the BL model, model-based forward lithography methods are exploited to obtain the optimized binary and phase-shifting masks. The advantages and limitations of the proposed algorithm are discussed and several illustrative simulations are presented.

Book Selected Papers on Resolution Enhancement Techniques in Optical Lithography

Download or read book Selected Papers on Resolution Enhancement Techniques in Optical Lithography written by F. M. Schellenberg and published by SPIE-International Society for Optical Engineering. This book was released on 2004 with total page 910 pages. Available in PDF, EPUB and Kindle. Book excerpt: Optical lithography for integrated circuits is undergoing a renaissance with the adoption of Resolution Enhancement Technology (RET). Some RET concepts have become routine in manufacturing. This volume gathers together seminal RET papers.

Book Resolution Enhancement of Contact Photolithography and Development of High Temperature Diamond Sensor

Download or read book Resolution Enhancement of Contact Photolithography and Development of High Temperature Diamond Sensor written by Tong June Kim and published by . This book was released on 2018 with total page 0 pages. Available in PDF, EPUB and Kindle. Book excerpt: This thesis systematically studies two main topics, namely, a sub-wavelength patterning method using contact photolithography and the development of a high-temperature diamond thermistor. The first topic introduces a novel sub-wavelength patterning process without the use of advanced optical tools. The method utilizes the re-entrant geometry of image reversal photoresist produced from the developing process, where a second mask is generated by isotropically depositing a metal layer that covers the re-entrant profile of the photoresist. Removing the photoresist by applying ultrasonic vibrations in an acetone bath uniformly cracks the metal layer at the sidewalls of the re-entrant profile, exposing the substrate with a reduced feature size. The width of the initial mask pattern can be reduced down by 400 nm in a controlled manner, regardless of the original width. As a result, the method is shown to achieve sub-100 nm scale linear patterns compatible for both the deposition process and dry etching process. Our approach is applicable to various patterns and can be used in electronic device fabrication requiring nanoscale lithography patterning. The second topic is the development of high-temperature diamond thermistor. Diamond is an excellent material for a thermistor that operates at high-temperature due to its superior material properties such as extreme hardness, high thermal conductivity, and a wide bandgap. Developing a high-temperature diamond thermistor requires a unique design and material choices for an accurate and stable operation at extreme temperatures. A design of the diamond thermistor where the diamond is sandwiched between contact pads are introduced. The thermistor was tested up to 700 °C and characterized by the Steinhart-Hart equations to show that the diamond thermistor successfully operates as a temperature sensor. To extend the operating range and increase the practicality, the thermistor design was improved by encasing it in a metal sheath tube that protects and seals the diamond thermistor. With the improved design, the diamond thermistor can operate up to 880 °C and shows stable performance in cycling tests. A long-term stability test was also performed to show that the metal sheath tube enables the diamond thermistor to be used as a practical temperature sensor.

Book Computational Lithography

Download or read book Computational Lithography written by Xu Ma and published by John Wiley & Sons. This book was released on 2011-01-06 with total page 225 pages. Available in PDF, EPUB and Kindle. Book excerpt: A Unified Summary of the Models and Optimization Methods Used in Computational Lithography Optical lithography is one of the most challenging areas of current integrated circuit manufacturing technology. The semiconductor industry is relying more on resolution enhancement techniques (RETs), since their implementation does not require significant changes in fabrication infrastructure. Computational Lithography is the first book to address the computational optimization of RETs in optical lithography, providing an in-depth discussion of optimal optical proximity correction (OPC), phase shifting mask (PSM), and off-axis illumination (OAI) RET tools that use model-based mathematical optimization approaches. The book starts with an introduction to optical lithography systems, electric magnetic field principles, and the fundamentals of optimization from a mathematical point of view. It goes on to describe in detail different types of optimization algorithms to implement RETs. Most of the algorithms developed are based on the application of the OPC, PSM, and OAI approaches and their combinations. Algorithms for coherent illumination as well as partially coherent illumination systems are described, and numerous simulations are offered to illustrate the effectiveness of the algorithms. In addition, mathematical derivations of all optimization frameworks are presented. The accompanying MATLAB® software files for all the RET methods described in the book make it easy for readers to run and investigate the codes in order to understand and apply the optimization algorithms, as well as to design a set of optimal lithography masks. The codes may also be used by readers for their research and development activities in their academic or industrial organizations. An accompanying MATLAB® software guide is also included. An accompanying MATLAB® software guide is included, and readers can download the software to use with the guide at ftp://ftp.wiley.com/public/sci_tech_med/computational_lithography. Tailored for both entry-level and experienced readers, Computational Lithography is meant for faculty, graduate students, and researchers, as well as scientists and engineers in industrial organizations whose research or career field is semiconductor IC fabrication, optical lithography, and RETs. Computational lithography draws from the rich theory of inverse problems, optics, optimization, and computational imaging; as such, the book is also directed to researchers and practitioners in these fields.

Book New Approaches in Optical Lithography Technology for Subwavelength Resolution

Download or read book New Approaches in Optical Lithography Technology for Subwavelength Resolution written by Hoyoung Kang and published by . This book was released on 2005 with total page 204 pages. Available in PDF, EPUB and Kindle. Book excerpt: "Advances in the semiconductor industry are mainly driven by improvements in optical lithography technology, which have enabled the continual shrinking of integrated circuit devices. However, optical lithography technology is approaching its limit, and within ten years, it may be substituted by new non-optical approaches. These may include Extreme Ultra Violet (EUV) lithography and charged particle beam projection lithography. While these technologies may have potentially better resolution, they can be very difficult to implement into manufacturing. During the course of the research presented here, the extension of optical lithography to sub 70nm resolution has been investigated. Since optical lithography is mature and well understood, extending it to allow for higher resolution can dramatically reduce manufacturing difficulties, compared to EUV or charged particle beam projection lithography. A majority of the existing infrastructure, such as photoresist materials, sources, optics, and photo-masks, remain applicable with the optical methods explored here. The avenues investigated in this research have concentrated on spatial frequency filtering in alternative Fourier Transform planes, vacuum UV wavelength lithography, and achieving ultra high numerical aperture imaging through the use of liquid immersion imaging. More specifically, novel spatial frequency filtering using angular transmission filters was developed and demonstrated. Multiple filter designs were proposed, one of which was successfully fabricated and implemented for lithographic imaging. Spatial filtering, using angular transmission filtering, proved to enhance the resolution of contact hole images by approximately 20%. Vacuum UV imaging at the 126nm wavelength was carried out but deemed likely to be less practical for commercial viability due to source, optics, and materials issues. Immersion lithography, using the 193nm wavelength ArF excimer laser, was investigated and demonstrated for very high numerical aperture imaging. Requirements for immersion lithography were established, including the necessary design of imaging fluids, optics, sources, and photoresist materials. As a development tool, an interference lithography system was built using the 193nm ArF excimer laser and water as an immersion fluid. Patterns below 70nm were printed using the process developed, which has established the potential to extend optical lithography further than was believed at the onset of this project. This research provides proof of the concept of extending optical lithography to the 70nm generation and below"--Abstract.

Book Managing Lithographic Variations in Design  Reliability  and Test Using Statistical Techniques

Download or read book Managing Lithographic Variations in Design Reliability and Test Using Statistical Techniques written by Aswin Sreedhar and published by . This book was released on 2011 with total page 137 pages. Available in PDF, EPUB and Kindle. Book excerpt: Much of today's high performance computing engines and hand-held mobile devices are products of aggressive CMOS scaling. Technology scaling in semiconductor industry is mainly driven by corresponding improvements in optical lithography technology. Photolithography, the art used to create patterns on the wafer is at the heart of the semiconductor manufacturing process. Lately, improvements in optical technology have been difficult and slow. The transition to deep ultra-violet (DUV) light source (193nm) required changes in lens materials, mask blanks, light source and photoresist. It took more than ten years to develop a stable chemically amplified resist (CAR) for DUV. Consequently, as the industry moves towards manufacturing end-of-the-roadmap CMOS devices, lithography is still based on 193nm light source to print critical dimensions of 45nm, 32nm and likely 22nm. Sub-wavelength lithography creates a number of printability issues. The printed patterns are highly sensitive to topographic changes due to metal planarization, overlay errors, focus and dose variations, random particle defects to name a few. Design for Manufacturability methodologies came into being to help analyze and mitigate manufacturing impacts on the design. Although techniques such as Resolution Enhancement Techniques (RET) which involve optical proximity correction (OPC), phase shift masking (PSM), off-axis illumination (OAI) have been used to greatly improve the printability and better the manufacturing process window, they cannot perfectly compensate for these lithographic deficiencies. DFM methods were primarily devised to predict and correct systematic patterning problems that arise during manufacturing. Apart from systematic errors, random manufacturing variations may occur during photolithography. This is where a statistical approach to modeling of error behavior and its impact on different design parameters may prove to be effective. By incorporating statistical analysis to parameter variation, an effective, non-conservative design can be obtained. IC manufacturing yield is the foremost measure that determines the profitability of a given semiconductor manufacturing process. Thus early prediction of yield detractors is an important step in the design process. Such predictions are based on models, which in turn are rooted in manufacturing process. Success of yield prediction is based on quality of models. The models must capture physical phenomena and yet be efficient for computation. In this work, we present a lithography-based yield model that is computationally practical for use in the design process. The work also provides a methodology to perform statistical lithography rules check to identify hot spots in the design that can contribute to yield loss. Yield recovery methods aimed at minimally modifying the design ultimately produce more printable masks. Apart from IC manufacturing yield, ICs today are vulnerable to various reliability failures including electromigration (EM), negative bias temperature instability (NBTI), hot carrier injection (HCI) and electro-static discharge (ESD). Though such reliability issues have been examined since the beginning of CMOS, manufacturability impacts have created a renewed interest in analyzing them. In this dissertation, we introduce the concept of Design for reliable manufacturability (DFRM) to consider the effect of linewidth changes, gate oxide thickness variations and other manufacturing artifacts. A novel Litho-aware EM calibration and analysis has bee shown in this work. Results indicate that there is a significant difference in EM estimation when litho-predicted layouts are considered during analysis. DFM has always looked at linewidth and material thickness variation as detractors to the design. However, such variations are inevitable. In this work we also consider modeling sensitivity to variations to improve test pattern quality. Test structures sprinkled all over the wafer encounter varying process fluctuations. This can be harnessed to predict the current lithographic process corner which will later be used to choose the test pattern set that results in maximum fault coverage. In summary, the objective of this dissertation is to consider the impact of sub-wavelength lithography on printability and the overall impact on circuit reliability and manufacturing test development.

Book Design Methodologies for Optical Lithography Induced Systematic Variations

Download or read book Design Methodologies for Optical Lithography Induced Systematic Variations written by Jen-Yi Wuu and published by . This book was released on 2011 with total page 142 pages. Available in PDF, EPUB and Kindle. Book excerpt: Designing robust integrated circuits have become increasingly challenging due to the presence of process variations. One of the main sources of process variations comes from optical lithography, which is the primary technology used for patterning design layouts on wafers. Aggressive scaling of feature size and the postponement of next-generation illumination sources causes serious degradation of on-silicon printed images. As a result, severe pattern distortions may occur, even when various resolution enhancement techniques are applied. In this dissertation, we propose design methodologies to address problems caused by lithography process variability. At the circuit simulation level, we propose a non-rectangular transistor modeling approach that derives an equivalent device gate length and width for accurate post-lithography circuit simulations and analyses. Only one equivalent device is built and it is accurate for both on and off modes. At the layout verification level, we propose a hierarchical lithographic hotspot pattern classification system that is both accurate and computationally efficient. We construct our pattern classifiers using support vector machines and use a layout density-based method for pattern characterization. Experimental results show that our method exhibits excellent predictive capability and complements the pattern matching-based methods very well. Last, at the post-placement layout optimization level, we propose an algorithm that detects lithographic hotspots in a given placement of one-dimensional gridded designs and applies local perturbation of cell locations to remove the hotspots. The hotspot detection system is constructed using machine learning techniques. Experimental results show that our method can effectively remove all hotspots while incurring negligible penalty on estimated wire lengths.

Book Nanolithography

Download or read book Nanolithography written by M Feldman and published by Woodhead Publishing. This book was released on 2014-02-13 with total page 599 pages. Available in PDF, EPUB and Kindle. Book excerpt: Integrated circuits, and devices fabricated using the techniques developed for integrated circuits, have steadily gotten smaller, more complex, and more powerful. The rate of shrinking is astonishing – some components are now just a few dozen atoms wide. This book attempts to answer the questions, “What comes next? and “How do we get there? Nanolithography outlines the present state of the art in lithographic techniques, including optical projection in both deep and extreme ultraviolet, electron and ion beams, and imprinting. Special attention is paid to related issues, such as the resists used in lithography, the masks (or lack thereof), the metrology needed for nano-features, modeling, and the limitations caused by feature edge roughness. In addition emerging technologies are described, including the directed assembly of wafer features, nanostructures and devices, nano-photonics, and nano-fluidics. This book is intended as a guide to the researcher new to this field, reading related journals or facing the complexities of a technical conference. Its goal is to give enough background information to enable such a researcher to understand, and appreciate, new developments in nanolithography, and to go on to make advances of his/her own. Outlines the current state of the art in alternative nanolithography technologies in order to cope with the future reduction in size of semiconductor chips to nanoscale dimensions Covers lithographic techniques, including optical projection, extreme ultraviolet (EUV), nanoimprint, electron beam and ion beam lithography Describes the emerging applications of nanolithography in nanoelectronics, nanophotonics and microfluidics

Book Pushing the Limits of Hyper NA Optical Lithography

Download or read book Pushing the Limits of Hyper NA Optical Lithography written by Yongfa Fan and published by . This book was released on 2005 with total page 328 pages. Available in PDF, EPUB and Kindle. Book excerpt: "The evolution of optical lithography to pattern smaller geometries [has] witnessed the shrinkage of source wavelength as a way to increase optical resolution. Shrinking of source wavelength into vacuum ultra-violet (VUV) faces a number of technical barriers with respect to imaging materials. Instead of source wavelength shrinking, the optical resolution can also be enhanced by increasing numerical aperture (NA) with immersion techniques. This dissertation is devoted to experimentally studying the imaging behaviors of hyper-NA optics in the context of liquid immersion and solid immersion lithography. In this dissertation, the full-vector interference theory is described for two-beam and multi-beam interferences. Polarization effects, resist absorption effects and BARC optimization are analyzed respectively. The experimental setup is analyzed in consideration of vibration, source temporal coherence and spatial coherence. Imaging with TE and TM polarization is studied respectively. A solid immersion technique is investigated experimentally to push the NA beyond what are available using fluids and imaging at NA values up to the index of the photoresist has been investigated. Moreover, NA values have been pushed higher than the refractive index of the resist, exposing resist using 'evanescent wave imaging.' This approach removes the index of a photoresist as a physical resolution limit, opening up new possibilities of resolution enhancement. The ultimate resolution limits of optical lithography have been discussed for a long time but th elimits have not been met yet. The achievements in this dissertation have shed light on this long-sought curiosity in the lithography community. Our experimental results proved the feasibility of 25 nm regime optical lithography. However, resolution beyond that would require innovations on higher index imaging materials, which are believed to be very limited. Air bubble induced light scattering effects on lithographic imaging have also been studied using geometrical optics and Mie scattering model. Lithographic imaging of 'bubbles' in an immersion water gap was studied by mimicking air bubbles with polystyrene spheres. By counting the number of 'bubbles' which are actually imaged and evaluating the number which are present in the optical path, the distance beyond which bubbles will not print can be estimated"--Abstract.

Book Optical and EUV Lithography

Download or read book Optical and EUV Lithography written by Andreas Erdmann and published by . This book was released on 2021-02 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt:

Book Catalysis and Materials Development for Photolithography

Download or read book Catalysis and Materials Development for Photolithography written by Ryan Alan Mesch and published by . This book was released on 2014 with total page 616 pages. Available in PDF, EPUB and Kindle. Book excerpt: In recent years the microelectronics industry as found itself at an impasse. The tradition pathway towards smaller transistors at lower costs has hit a roadblock with the failure of 157 nm lithography and the continued delays in 13.5 nm extreme ultra violet light sources. While photolithography has been able to keep pace with Moore's law over the past four decades, alternative patterning technologies are now required to keep up with market demand. The first section of this dissertation discusses the new resolution enhancement technique develop in the Willson lab termed pitchdivision. Through the incorporation of specifically tailored photobase generators (PBGs) into commercially available resists, the resolution of current 193 tools may be doubled. Special two-stage PBGs were designed and synthesized to increase the image fidelity of pitchdivision patterns. The next project deals with the design, synthesis, and evaluation of resists that find amplification through unzipping polymers. An aromatizing polyester polymer that acts as dissolution inhibitor in novolac and is inherently sensitive to 13.5 nm exposure is discussed. Initial results show excellent sensitivity and promise towards a new class of EUV resists.

Book Lithography driven Design for Manufacturing in Nanometer era VLSI

Download or read book Lithography driven Design for Manufacturing in Nanometer era VLSI written by Chul-Hong Park and published by . This book was released on 2008 with total page 202 pages. Available in PDF, EPUB and Kindle. Book excerpt: Photolithography has been a key enabler of the aggressive IC technology scaling implicit in Moore's Law. As minimum feature sizes approach the physical limits of lithography and the manufacturing process, resolution enhancement techniques (RETs) dictate certain tradeoffs with various aspects of process and performance. This in turn has led to unpredictable design, unpredictable manufacturing, and low yield. As a result, close communication between designer and manufacturer has become essential to overcome the uncertainties of design and manufacturing. The design for manufacturability (DFM) paradigm has emerged recently to improve communications at the design-manufacturing interface and to reduce manufacturing variability. DFM is a set of technologies and methodologies that both help the designer extract maximum value from silicon process technology and solve "unsolvable" manufacturing challenges. Traditional DFM techniques, which include design rule check (DRC) and optical proximity correction (OPC), have been successfully used until now. However, as the extent and complexity of lithography variations increase, traditional techniques are no longer adequate to accommodate the various lithography demands. This thesis focuses on ways to mitigate the impact of lithography variations on design by establishing new interfaces between design and manufacturing. The motivations for doing so are improved printability, timing and leakage as well as reduced design cost. To improve printability, we propose a detailed placement perturbation technique for improved depth of focus and process window. Using a dynamic programming (DP)-based method for the perturbation, the technique facilitates insertion of scattering bars and etch dummy features, reducing inter-cell forbidden pitches almost completely. We also propose a novel auxiliary pattern-enabled cell-based OPC which can improve the edge placement error over cell-based OPC. The technique improves runtime which has grown unacceptably in model-based OPC, while retaining its runtime advantage as well as timing and leakage optimization. The detailed placement framework is also available to allow opportunistic insertion of auxiliary pattern around cell instances in the design layout. Aberration leads to linewidth variation which is fundamental to achieve timing performance and manufacturing yield. We describe an aberration-aware timing analysis flow that accounts for aberration-induced cell delay variations. We then propose an aberration-aware timing-driven global placement technique which utilizes the predictable slow and fast regions created on the chip due to aberration to improve cycle time. The use of the technique along with field blading achieves significant cycle time improvement. DoseMapper technique adopted in advanced lithography equipments has been used to reduce the across-chip linewidth variation. We propose a novel method to enhance timing yield as well as reduce leakage power by combined dose map and placement optimizations. The new dose map is not determined to have the same critical dimension (CD) in all transistor gates, but optimized to have different linewidths. That is, for devices on setup timing-critical paths, a smaller than nominal CD will be desirable, since this creates a faster-switching transistor. On the other hand, for devices on hold timing-critical paths, a larger than nominal gate CD will be desirable since this creates a less leaky transistor. Last, the golden verification signoff tool using simulation-based approach represents a runtime-quality tradeoff that is high in quality, but also high in runtime. We are motivated to develop a low-runtime pre-filter that reduces the amount of layout area to be analyzed by the golden tool, without compromising the overall quality finding hotspots. We demonstrate a dual graph-based hotspot filtering technique that enables fast and accurate estimation.

Book Diminution of the Lithographic Process Variability for Advanced Technology Nodes

Download or read book Diminution of the Lithographic Process Variability for Advanced Technology Nodes written by Anna Szucs and published by . This book was released on 2015 with total page 0 pages. Available in PDF, EPUB and Kindle. Book excerpt: The currently used 193 nm optical lithography reaches its limits from resolution point of view. Itis despite of the fact that various techniques have been developed to push this limit as much aspossible. Indeed new generation lithography exists such as the EUV, but are not yet reliable to beapplied in mass production. Thus in orders to maintain a robust lithographic process for theseshrunk nodes, 28 nm and beyond, the optical lithography needs to be further explored. It ispossible through alternatives techniques: e.g. the RETs (Resolution Enhancement Techniques),such as OPC (Optical Proximity Correction) and the double patterning. In addition to theresolution limits, advanced technology nodes are dealing with increasing complexity of design andsteadily increasing process variability requiring more and more compromises.In the light of this increasing complexity, this dissertation work is addressed to mitigate thelithographic process variability by the implementation of a correction (mitigation) flow exploredmainly through the capability of computational lithography. Within this frame, our main objectiveis to participate to the challenge of assuring a good imaging quality for the process windowlimiting patterns with an acceptable gain in uDoF (usable Depth of Focus).In order to accomplish this task, we proposed and validated a flow that might be laterimplemented in the production. The proposed flow consists on simulation based detectionmethodology of the most critical patterns that are impacted by effects coming from the masktopography and the resist profile. Furthermore it consists of the mitigation and the compensationof these effects, once the critical patterns are detected. The obtained results on the completedflow are encouraging: a validated method that detects the critical patterns and then mitigates thelithographic process variability been developed successfully.

Book Extending Moore s Law through Advanced Semiconductor Design and Processing Techniques

Download or read book Extending Moore s Law through Advanced Semiconductor Design and Processing Techniques written by Wynand Lambrechts and published by CRC Press. This book was released on 2018-09-13 with total page 354 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides a methodological understanding of the theoretical and technical limitations to the longevity of Moore’s law. The book presents research on factors that have significant impact on the future of Moore’s law and those factors believed to sustain the trend of the last five decades. Research findings show that boundaries of Moore’s law primarily include physical restrictions of scaling electronic components to levels beyond that of ordinary manufacturing principles and approaching the bounds of physics. The research presented in this book provides essential background and knowledge to grasp the following principles: Traditional and modern photolithography, the primary limiting factor of Moore’s law Innovations in semiconductor manufacturing that makes current generation CMOS processing possible Multi-disciplinary technologies that could drive Moore's law forward significantly Design principles for microelectronic circuits and components that take advantage of technology miniaturization The semiconductor industry economic market trends and technical driving factors The complexity and cost associated with technology scaling have compelled researchers in the disciplines of engineering and physics to optimize previous generation nodes to improve system-on-chip performance. This is especially relevant to participate in the increased attractiveness of the Internet of Things (IoT). This book additionally provides scholarly and practical examples of principles in microelectronic circuit design and layout to mitigate technology limits of previous generation nodes. Readers are encouraged to intellectually apply the knowledge derived from this book to further research and innovation in prolonging Moore’s law and associated principles.