Download or read book Characterization of Process Variability and Robust Optimization of Analog Circuits written by Daihyun Lim and published by . This book was released on 2008 with total page 174 pages. Available in PDF, EPUB and Kindle. Book excerpt: Continuous scaling of CMOS technology has enabled dramatic performance enhancement of CMOS devices and has provided speed, power, and density improvement in both digital and analog circuits. CMOS millimeter-wave applications operating at more than 50GHz frequencies has become viable in sub-100nm CMOS technologies, providing advantages in cost and high density integration compared to other heterogeneous technologies such as SiGe and III-V compound semiconductors. However, as the operating frequency of CMOS circuits increases, it becomes more difficult to obtain sufficiently wide operating ranges for robust operation in essential analog building blocks such as voltage-controlled oscillators (VCOs) and frequency dividers. The fluctuations of circuit parameters caused by the random and systematic variations in key manufacturing steps become more significant in nano-scale technologies. The process variation of circuit performance is quickly becoming one of the main concerns in high performance analog design. In this thesis, we show design and analysis of a VCO and frequency divider operating beyond 70GHz in a 65nm SOI CMOS technology. The VCO and frequency divider employ design techniques enlarging frequency operating ranges to improve the robustness of circuit operation. Circuit performance is measured from a number of die samples to identify the statistical properties of performance variation. A back-propagation of variation (BPV) scheme based on sensitivity analysis of circuit performance is proposed to extract critical circuit parameter variation using statistical measurement results of the frequency divider. We analyze functional failure caused by performance variability, and propose dynamic and static optimization methods to improve parametric yield. An external bias control is utilized to dynamically tune the divider operating range and to compensate for performance variation. A novel time delay model of a differential CML buffer is proposed to functionally approximate the maximum operating frequency of the frequency divider, which dramatically reduces computational cost of parametric yield estimation. The functional approximation enables the optimization of the VCO and frequency divider parametric yield with a reasonable amount of simulation time.

Download or read book The Characterization and Model Optimization of an Analog Integrated Circuit Standard Cell Library written by Mallika Gopinath and published by . This book was released on 2004 with total page 318 pages. Available in PDF, EPUB and Kindle. Book excerpt: Since the beginning of the VLSI era, various technologies have been adopted for developing the design and characterization of analog circuits. For robust design, the influences of the process parameter variations have been considered over the circuit simulation. Previous studies in this field concentrated more on the physical dimensions such as the width, length, area and perimeter as well as the threshold voltage of the device. The focus of this thesis was to characterize the performance of an analog IC standard cell library as well as optimize the simulation models. The circuits include n-channel metal-oxide semiconductor field-effect transistors (NMOSFETs), p-channel metal-oxide semiconductor field-effect transistors (PMOSFETs), poly resistors, current mirrors, comparators, bias generators, voltage references, op-amps, and voltage regulators. The spice model used for simulation was the Berkeley Simulator version 3 (BSIM3) Tanner Research designed the majority of the standard cells evaluated. These cells were fabricated in the AMI 1.5-um CMOS process using the MOSIS service. The Integrated Circuits (ICs) have been developed using software from Tanner Research namely, the schematic editor (S-Edit), layout editor (L-Edit) and simulated using Tanner version of Spice (T-Spice). The simulations carried out on the circuits using the optimized model exhibited an overall performance improvement over the unoptimized model. Based on these simulations, numerous plots and tables are presented and the data was discussed in terms of the output tables are presented and the data was discussed in terms of the output characteristics. There was a noticeable improvement in the accuracy of 60.44% for the PMOSFET and 17.25% for the NMOSFET with the optimized model. The direct current (DC) fit using the optimized model over the unoptimized model showed an improvement of 2.17% (Voltage reference), 1-24% (Bias Generator), 2% (N-Current mirror), 5% (P-Current mirror), 11-30% (Analog Buffer) and 1.74% (Op-Amp).

Download or read book Analog Circuits and Systems Optimization based on Evolutionary Computation Techniques written by Manuel Barros and published by Springer. This book was released on 2010-04-13 with total page 247 pages. Available in PDF, EPUB and Kindle. Book excerpt: The microelectronics market, with special emphasis to the production of complex mixed-signal systems-on-chip (SoC), is driven by three main dynamics, time-- market, productivity and managing complexity. Pushed by the progress in na- meter technology, the design teams are facing a curve of complexity that grows exponentially, thereby slowing down the productivity design rate. Analog design automation tools are not developing at the same pace of technology, once custom design, characterized by decisions taken at each step of the analog design flow, - lies most of the time on designer knowledge and expertise. Actually, the use of - sign management platforms, like the Cadences Virtuoso platform, with a set of - tegrated CAD tools and database facilities to deal with the design transformations from the system level to the physical implementation, can significantly speed-up the design process and enhance the productivity of analog/mixed-signal integrated circuit (IC) design teams. These design management platforms are a valuable help in analog IC design but they are still far behind the development stage of design automation tools already available for digital design. Therefore, the development of new CAD tools and design methodologies for analog and mixed-signal ICs is ess- tial to increase the designer’s productivity and reduce design productivitygap. The work presented in this book describes a new design automation approach to the problem of sizing analog ICs.

Download or read book Analog Circuit Design for Process Variation Resilient Systems on a Chip written by Marvin Onabajo and published by Springer Science & Business Media. This book was released on 2012-03-08 with total page 183 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book describes several techniques to address variation-related design challenges for analog blocks in mixed-signal systems-on-chip. The methods presented are results from recent research works involving receiver front-end circuits, baseband filter linearization, and data conversion. These circuit-level techniques are described, with their relationships to emerging system-level calibration approaches, to tune the performances of analog circuits with digital assistance or control. Coverage also includes a strategy to utilize on-chip temperature sensors to measure the signal power and linearity characteristics of analog/RF circuits, as demonstrated by test chip measurements. Describes a variety of variation-tolerant analog circuit design examples, including from RF front-ends, high-performance ADCs and baseband filters; Includes built-in testing techniques, linked to current industrial trends; Balances digitally-assisted performance tuning with analog performance tuning and mismatch reduction approaches; Describes theoretical concepts as well as experimental results for test chips designed with variation-aware techniques.

Download or read book Variation Aware Analog Structural Synthesis written by Trent McConaghy and published by Springer Science & Business Media. This book was released on 2009-07-13 with total page 316 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book describes new tools for front end analog designers, starting with global variation-aware sizing, and extending to novel variation-aware topology design. The tools aid design through automation, but more importantly, they also aid designer insight through automation. We now describe four design tasks, each more general than the previous, and how this book contributes design aids and insight aids to each. The ?rst designer task targeted is global robust sizing. This task is supported by a design tool that does automated, globally reliable, variation-aware s- ing (SANGRIA),and an insight-aiding tool that extracts designer-interpretable whitebox models that relate sizings to circuit performance (CAFFEINE). SANGRIA searches on several levels of problem dif?culty simultaneously, from lower cheap-to-evaluate “exploration” layers to higher full-evaluation “exploitation” layers (structural homotopy). SANGRIAmakes maximal use of circuit simulations by performing scalable data mining on simulation results to choose new candidate designs. CAFFEINE accomplishes its task by tre- ing function induction as a tree-search problem. It constrains its tree search space via a canonical-functional-form grammar, and searches the space with grammatically constrained genetic programming. The second designer task is topology selection/topology design. Topology selection tools must consider a broad variety of topologies such that an app- priate topology is selected, must easily adapt to new semiconductor process nodes, and readily incorporate new topologies. Topology design tools must allow designers to creatively explore new topology ideas as rapidly as possible.

Download or read book Process Variations and Probabilistic Integrated Circuit Design written by Manfred Dietrich and published by Springer Science & Business Media. This book was released on 2011-11-20 with total page 261 pages. Available in PDF, EPUB and Kindle. Book excerpt: Uncertainty in key parameters within a chip and between different chips in the deep sub micron area plays a more and more important role. As a result, manufacturing process spreads need to be considered during the design process. Quantitative methodology is needed to ensure faultless functionality, despite existing process variations within given bounds, during product development. This book presents the technological, physical, and mathematical fundamentals for a design paradigm shift, from a deterministic process to a probability-orientated design process for microelectronic circuits. Readers will learn to evaluate the different sources of variations in the design flow in order to establish different design variants, while applying appropriate methods and tools to evaluate and optimize their design.

Download or read book Automated Design of Analog and High frequency Circuits written by Bo Liu and published by Springer. This book was released on 2013-08-16 with total page 243 pages. Available in PDF, EPUB and Kindle. Book excerpt: Computational intelligence techniques are becoming more and more important for automated problem solving nowadays. Due to the growing complexity of industrial applications and the increasingly tight time-to-market requirements, the time available for thorough problem analysis and development of tailored solution methods is decreasing. There is no doubt that this trend will continue in the foreseeable future. Hence, it is not surprising that robust and general automated problem solving methods with satisfactory performance are needed.

Download or read book Analog Circuit Design for Process Variation Resilient Systems on a Chip written by Marvin Onabajo and published by Springer. This book was released on 2012-03-08 with total page 174 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book describes several techniques to address variation-related design challenges for analog blocks in mixed-signal systems-on-chip. The methods presented are results from recent research works involving receiver front-end circuits, baseband filter linearization, and data conversion. These circuit-level techniques are described, with their relationships to emerging system-level calibration approaches, to tune the performances of analog circuits with digital assistance or control. Coverage also includes a strategy to utilize on-chip temperature sensors to measure the signal power and linearity characteristics of analog/RF circuits, as demonstrated by test chip measurements. Describes a variety of variation-tolerant analog circuit design examples, including from RF front-ends, high-performance ADCs and baseband filters; Includes built-in testing techniques, linked to current industrial trends; Balances digitally-assisted performance tuning with analog performance tuning and mismatch reduction approaches; Describes theoretical concepts as well as experimental results for test chips designed with variation-aware techniques.

Download or read book Analog Circuits and Systems Optimization based on Evolutionary Computation Techniques written by Manuel Barros and published by Springer Science & Business Media. This book was released on 2010-04-22 with total page 247 pages. Available in PDF, EPUB and Kindle. Book excerpt: The microelectronics market, with special emphasis to the production of complex mixed-signal systems-on-chip (SoC), is driven by three main dynamics, time-- market, productivity and managing complexity. Pushed by the progress in na- meter technology, the design teams are facing a curve of complexity that grows exponentially, thereby slowing down the productivity design rate. Analog design automation tools are not developing at the same pace of technology, once custom design, characterized by decisions taken at each step of the analog design flow, - lies most of the time on designer knowledge and expertise. Actually, the use of - sign management platforms, like the Cadences Virtuoso platform, with a set of - tegrated CAD tools and database facilities to deal with the design transformations from the system level to the physical implementation, can significantly speed-up the design process and enhance the productivity of analog/mixed-signal integrated circuit (IC) design teams. These design management platforms are a valuable help in analog IC design but they are still far behind the development stage of design automation tools already available for digital design. Therefore, the development of new CAD tools and design methodologies for analog and mixed-signal ICs is ess- tial to increase the designer’s productivity and reduce design productivitygap. The work presented in this book describes a new design automation approach to the problem of sizing analog ICs.

Download or read book Performance Optimization Techniques in Analog Mixed Signal and Radio Frequency Circuit Design written by Fakhfakh, Mourad and published by IGI Global. This book was released on 2014-10-31 with total page 488 pages. Available in PDF, EPUB and Kindle. Book excerpt: Improving the performance of existing technologies has always been a focal practice in the development of computational systems. However, as circuitry is becoming more complex, conventional techniques are becoming outdated and new research methodologies are being implemented by designers. Performance Optimization Techniques in Analog, Mix-Signal, and Radio-Frequency Circuit Design features recent advances in the engineering of integrated systems with prominence placed on methods for maximizing the functionality of these systems. This book emphasizes prospective trends in the field and is an essential reference source for researchers, practitioners, engineers, and technology designers interested in emerging research and techniques in the performance optimization of different circuit designs.

Download or read book Advances in Analog Circuits written by Esteban Tlelo-Cuautle and published by BoD – Books on Demand. This book was released on 2011-02-02 with total page 384 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book highlights key design issues and challenges to guarantee the development of successful applications of analog circuits. Researchers around the world share acquired experience and insights to develop advances in analog circuit design, modeling and simulation. The key contributions of the sixteen chapters focus on recent advances in analog circuits to accomplish academic or industrial target specifications.

Download or read book Hierarchical Process Variability Analysis for Analog Circuits and Its Application to Test Development Fault Diagnosis Yield Estimation and Design Synthesis written by Fang Liu and published by . This book was released on 2007 with total page 211 pages. Available in PDF, EPUB and Kindle. Book excerpt: Experiments on various analog circuits are conducted to show the efficacy of the proposed techniques in this dissertation. Experimental results confirm that using the proposed techniques, significant improvements over the state-of the art can be attained in all of these explored areas.

Download or read book Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs written by Ruijing Shen and published by Springer Science & Business Media. This book was released on 2014-07-08 with total page 326 pages. Available in PDF, EPUB and Kindle. Book excerpt: Since process variation and chip performance uncertainties have become more pronounced as technologies scale down into the nanometer regime, accurate and efficient modeling or characterization of variations from the device to the architecture level have become imperative for the successful design of VLSI chips. This book provides readers with tools for variation-aware design methodologies and computer-aided design (CAD) of VLSI systems, in the presence of process variations at the nanometer scale. It presents the latest developments for modeling and analysis, with a focus on statistical interconnect modeling, statistical parasitic extractions, statistical full-chip leakage and dynamic power analysis considering spatial correlations, statistical analysis and modeling for large global interconnects and analog/mixed-signal circuits. Provides readers with timely, systematic and comprehensive treatments of statistical modeling and analysis of VLSI systems with a focus on interconnects, on-chip power grids and clock networks, and analog/mixed-signal circuits; Helps chip designers understand the potential and limitations of their design tools, improving their design productivity; Presents analysis of each algorithm with practical applications in the context of real circuit design; Includes numerical examples for the quantitative analysis and evaluation of algorithms presented. Provides readers with timely, systematic and comprehensive treatments of statistical modeling and analysis of VLSI systems with a focus on interconnects, on-chip power grids and clock networks, and analog/mixed-signal circuits; Helps chip designers understand the potential and limitations of their design tools, improving their design productivity; Presents analysis of each algorithm with practical applications in the context of real circuit design; Includes numerical examples for the quantitative analysis and evaluation of algorithms presented.

Download or read book Analog Circuit Design for Process Variation Resilient Systems on a Chip written by Marvin Onabajo and published by Springer Science & Business Media. This book was released on 2012-03-08 with total page 183 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book describes several techniques to address variation-related design challenges for analog blocks in mixed-signal systems-on-chip. The methods presented are results from recent research works involving receiver front-end circuits, baseband filter linearization, and data conversion. These circuit-level techniques are described, with their relationships to emerging system-level calibration approaches, to tune the performances of analog circuits with digital assistance or control. Coverage also includes a strategy to utilize on-chip temperature sensors to measure the signal power and linearity characteristics of analog/RF circuits, as demonstrated by test chip measurements. Describes a variety of variation-tolerant analog circuit design examples, including from RF front-ends, high-performance ADCs and baseband filters; Includes built-in testing techniques, linked to current industrial trends; Balances digitally-assisted performance tuning with analog performance tuning and mismatch reduction approaches; Describes theoretical concepts as well as experimental results for test chips designed with variation-aware techniques.

Download or read book Yield Aware Analog IC Design and Optimization in Nanometer scale Technologies written by António Manuel Lourenço Canelas and published by Springer Nature. This book was released on 2020-03-20 with total page 254 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book presents a new methodology with reduced time impact to address the problem of analog integrated circuit (IC) yield estimation by means of Monte Carlo (MC) analysis, inside an optimization loop of a population-based algorithm. The low time impact on the overall optimization processes enables IC designers to perform yield optimization with the most accurate yield estimation method, MC simulations using foundry statistical device models considering local and global variations. The methodology described by the authors delivers on average a reduction of 89% in the total number of MC simulations, when compared to the exhaustive MC analysis over the full population. In addition to describing a newly developed yield estimation technique, the authors also provide detailed background on automatic analog IC sizing and optimization.

Download or read book VLSI written by Zhongfeng Wang and published by BoD – Books on Demand. This book was released on 2010-02-01 with total page 467 pages. Available in PDF, EPUB and Kindle. Book excerpt: The process of Integrated Circuits (IC) started its era of VLSI (Very Large Scale Integration) in 1970’s when thousands of transistors were integrated into one single chip. Nowadays we are able to integrate more than a billion transistors on a single chip. However, the term “VLSI” is still being used, though there was some effort to coin a new term ULSI (Ultra-Large Scale Integration) for fine distinctions many years ago. VLSI technology has brought tremendous benefits to our everyday life since its occurrence. VLSI circuits are used everywhere, real applications include microprocessors in a personal computer or workstation, chips in a graphic card, digital camera or camcorder, chips in a cell phone or a portable computing device, and embedded processors in an automobile, et al. VLSI covers many phases of design and fabrication of integrated circuits. For a commercial chip design, it involves system definition, VLSI architecture design and optimization, RTL (register transfer language) coding, (pre- and post-synthesis) simulation and verification, synthesis, place and route, timing analyses and timing closure, and multi-step semiconductor device fabrication including wafer processing, die preparation, IC packaging and testing, et al. As the process technology scales down, hundreds or even thousands of millions of transistors are integrated into one single chip. Hence, more and more complicated systems can be integrated into a single chip, the so-called System-on-chip (SoC), which brings to VLSI engineers ever increasingly challenges to master techniques in various phases of VLSI design. For modern SoC design, practical applications are usually speed hungry. For instance, Ethernet standard has evolved from 10Mbps to 10Gbps. Now the specification for 100Mbps Ethernet is on the way. On the other hand, with the popularity of wireless and portable computing devices, low power consumption has become extremely critical. To meet these contradicting requirements, VLSI designers have to perform optimizations at all levels of design. This book is intended to cover a wide range of VLSI design topics. The book can be roughly partitioned into four parts. Part I is mainly focused on algorithmic level and architectural level VLSI design and optimization for image and video signal processing systems. Part II addresses VLSI design optimizations for cryptography and error correction coding. Part III discusses general SoC design techniques as well as other application-specific VLSI design optimizations. The last part will cover generic nano-scale circuit-level design techniques.

Download or read book Surrogate Based Optimization and Verification of Analog and Mixed Signal Circuits written by Ibtissem Seghaier and published by . This book was released on 2018 with total page 171 pages. Available in PDF, EPUB and Kindle. Book excerpt: Nonlinear Analog and Mixed Signal (AMS) circuits are very complex and expensive to design and verify. Deeper technology scaling has made these designs susceptible to noise and process variations which presents a growing concern due to the degradation in the circuit performances and risks of design failures. In fact, due to process parameters, AMS circuits like phase locked loops may present chaotic behavior that can be confused with noisy behavior. To design and verify circuits, current industrial designs rely heavily on simulation based verification and knowledge based optimization techniques. However, such techniques lack mathematical rigor necessary to catch up with the growing design constraints besides being computationally intractable. Given all aforementioned barriers, new techniques are needed to ensure that circuits are robust and optimized despite process variations and possible chaotic behavior. In this thesis, we develop a methodology for optimization and verification of AMS circuits advancing three frontiers in the variability-aware design flow. The first frontier is a robust circuit sizing methodology wherein a multi-level circuit optimization approach is proposed. The optimization is conducted in two phases. First, a global sizing phase powered by a regional sensitivity analysis to quickly scout the feasible design space that reduces the optimization search. Second, nominal sizing step based on space mapping of two AMS circuits models at different levels of abstraction is developed for the sake of breaking the re-design loop without performance penalties. The second frontier concerns a dynamics verification scheme of the circuit behavior (i.e., study the chaotic vs. stochastic circuit behavior). It is based on a surrogate generation approach and a statistical proof by contradiction technique using Gaussian Kernel measure in the state space domain. The last frontier focus on quantitative verification approaches to predict parametric yield for both a single and multiple circuit performance constraints. The single performance approach is based on a combination of geometrical intertwined reachability analysis and a non-parametric statistical verification scheme. On the other hand, the multiple performances approach involves process parameter reduction, state space based pattern matching, and multiple hypothesis testing procedures. The performance of the proposed methodology is demonstrated on several benchmark analog and mixed signal circuits. The optimization approach greatly improves computational efficiency while locating a comparable/better design point than other approaches. Moreover, great improvements were achieved using our verification methods with many orders of speedup compared to existing techniques.