Download or read book Architectures and Circuit Design Techniques for Ultra Low Voltage CMOS Receivers written by Ajay Balankutty and published by . This book was released on 2010 with total page 336 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Ultra Low Power and Ultra Low Cost Short Range Wireless Receivers in Nanoscale CMOS written by Zhicheng Lin and published by Springer. This book was released on 2015-07-25 with total page 119 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides readers with a state-of-the-art description of techniques to be used for ultra-low-power (ULP) and ultra-low-cost (ULC), short-range wireless receivers. Readers will learn what is required to deploy these receivers in short-range wireless sensor networks, which are proliferating widely to serve the internet of things (IoT) for “smart cities.” The authors address key challenges involved with the technology and the typical tradeoffs between ULP and ULC. Three design examples with advanced circuit techniques are described in order to address these trade-offs, which special focus on cost minimization. These three techniques enable respectively, cascading of radio frequency (RF) and baseband (BB) circuits under an ultra-low-voltage (ULV) supply, cascading of RF and BB circuits in current domain for current reuse and a novel function-reuse receiver architecture, suitable for ULV and multi-band ULP applications such as the sub-GHz ZigBee.

Download or read book Low Power Circuit Design Using Advanced CMOS Technology written by Milin Zhang and published by CRC Press. This book was released on 2022-09-01 with total page 551 pages. Available in PDF, EPUB and Kindle. Book excerpt: Low Power Circuit Design Using Advanced CMOS Technology is a summary of lectures from the first Advanced CMOS Technology Summer School (ACTS) 2017. The slides are selected from the handouts, while the text was edited according to the lecturers talk.ACTS is a joint activity supported by the IEEE Circuit and System Society (CASS) and the IEEE Solid-State Circuits Society (SSCS). The goal of the school is to provide society members as well researchers and engineers from industry the opportunity to learn about new emerging areas from leading experts in the field. ACTS is an example of high-level continuous education for junior engineers, teachers in academe, and students. ACTS was the results of a successful collaboration between societies, the local chapter leaders, and industry leaders. This summer school was the brainchild of Dr. Zhihua Wang, with strong support from volunteers from both the IEEE SSCS and CASS. In addition, the local companies, Synopsys China and Beijing IC Park, provided support.This first ACTS was held in the summer 2017 in Beijing. The lectures were given by academic researchers and industry experts, who presented each 6-hour long lectures on topics covering process technology, EDA skill, and circuit and layout design skills. The school was hosted and organized by the CASS Beijing Chapter, SSCS Beijing Chapter, and SSCS Tsinghua Student Chapter. The co-chairs of the first ACTS were Dr. Milin Zhang, Dr. Hanjun Jiang and Dr. Liyuan Liu. The first ACTS was a great success as illustrated by the many participants from all over China as well as by the publicity it has been received in various media outlets, including Xinhua News, one of the most popular news channels in China.

Download or read book Ultra low Voltage Low Power Active RC Filters and Amplifiers for Low Energy RF Receivers written by Lucas Compassi Severo and published by Springer Nature. This book was released on 2021-12-04 with total page 143 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book presents innovative strategies to implement ultra-low voltage (ULV) and low power active circuits used in low energy RF receivers. The authors demonstrate that the use of single-stage amplifiers with the input negative transconductance compensation is a key strategy to allow the operation at low voltage levels with reduced power dissipation. Also, some design methodologies, based on the CMOS transistor operation point, are analyzed and a powerful design methodology is described for this kind of circuit. Readers will be enabled to implement the techniques described to design communication circuits with low power dissipation, useful in a variety of applications, including IoT/IoE devices.

Download or read book Wideband CMOS Receivers written by Miguel D. Fernandes and published by Springer. This book was released on 2015-07-10 with total page 115 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book demonstrates how to design a wideband receiver operating in current mode, in which the noise and non-linearity are reduced, implemented in a low cost single chip, using standard CMOS technology. The authors present a solution to remove the transimpedance amplifier (TIA) block and connect directly the mixer’s output to a passive second-order continuous-time Σ∆ analog to digital converter (ADC), which operates in current-mode. These techniques enable the reduction of area, power consumption, and cost in modern CMOS receivers.

Download or read book Content Based Video Retrieval written by Johan Janssens and published by Springer Science & Business Media. This book was released on 2002-01-31 with total page 267 pages. Available in PDF, EPUB and Kindle. Book excerpt: CMOS Cellular Receiver Front-Ends: From Specification to Realization deals with the design of the receive path of a highly-integrated CMOS cellular transceiver for the GSM-1800 cellular system. The complete design trajectory is covered, starting from the documents describing the standard down to the systematic development of CMOS receiver ICs that comply to the standard. The design of CMOS receivers is tackled at all abstraction levels: from architecture level, via circuit level, down to the device level, and the other way around. Different receiver architectures are compared with respect to integratability, achievable performance and required building block specifications. The requirements of the GSM-1800 standard are mapped onto a set of measurable specifications for a highly-integrated low-IF receiver and distributed among the different building blocks. Several circuit topologies are presented that realize the main functions of the receive path. The dynamics of the elementary specifications of these circuits are explained in terms of the operating point of the involved devices. Wherever possible, this is done using analytical expressions. Based on these insights, detailed sizing procedures are developed to systematically size these RF circuits for a set of specifications. The feasibility of meeting the requirements of today's high-end cellular standards is demonstrated in a mainstream submicron CMOS technology by the development of two highly-integrated GSM-1800 receivers. The theoretical core of the book discusses the fundamental and more advanced aspects of RF CMOS design. It focuses specifically on all aspects of the design of high-performance CMOS low-noise amplifiers. Attempts are made to reconcile the analog designer's and the RF designer's point of view on how to look at submicron CMOS transistors. Special attention is given to the fallacies and pitfalls of input matching in a CMOS context. A methodology for the systematic design of CMOS low-noise amplifiers is presented which is based on a bank of analytical equations for all important LNA specifications. The method is validated by the design of a low power, extremely low noise CMOS GPS LNA.

Download or read book Analog Baseband Architectures and Circuits for Multistandard and Low Voltage Wireless Transceivers written by Pui-In Mak and published by Springer Science & Business Media. This book was released on 2007-09-07 with total page 194 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book presents architectural and circuit techniques for wireless transceivers to achieve multistandard and low-voltage compliance. It provides an up-to-date survey and detailed study of the state-of-the-art transceivers for modern single- and multi-purpose wireless communication systems. The book includes comprehensive analysis and design of multimode reconfigurable receivers and transmitters for an efficient multistandard compliance.

Download or read book Low Power RF Circuit Design in Standard CMOS Technology written by Unai Alvarado and published by Springer Science & Business Media. This book was released on 2011-10-18 with total page 248 pages. Available in PDF, EPUB and Kindle. Book excerpt: Low Power Consumption is one of the critical issues in the performance of small battery-powered handheld devices. Mobile terminals feature an ever increasing number of wireless communication alternatives including GPS, Bluetooth, GSM, 3G, WiFi or DVB-H. Considering that the total power available for each terminal is limited by the relatively slow increase in battery performance expected in the near future, the need for efficient circuits is now critical. This book presents the basic techniques available to design low power RF CMOS analogue circuits. It gives circuit designers a complete guide of alternatives to optimize power consumption and explains the application of these rules in the most common RF building blocks: LNA, mixers and PLLs. It is set out using practical examples and offers a unique perspective as it targets designers working within the standard CMOS process and all the limitations inherent in these technologies.

Download or read book Low Voltage CMOS Log Companding Analog Design written by Francisco Serra-Graells and published by Springer Science & Business Media. This book was released on 2006-04-18 with total page 209 pages. Available in PDF, EPUB and Kindle. Book excerpt: Low-Voltage CMOS Log Companding Analog Design presents in detail state-of-the-art analog circuit techniques for the very low-voltage and low-power design of systems-on-chip in CMOS technologies. The proposed strategy is mainly based on two bases: the Instantaneous Log Companding Theory, and the MOSFET operating in the subthreshold region. The former allows inner compression of the voltage dynamic-range for very low-voltage operation, while the latter is compatible with CMOS technologies and suitable for low-power circuits. The required background on the specific modeling of the MOS transistor for Companding is supplied at the beginning. Following this general approach, a complete set of CMOS basic building blocks is proposed and analyzed for a wide variety of analog signal processing. In particular, the covered areas include: amplification and AGC, arbitrary filtering, PTAT generation, and pulse duration modulation (PDM). For each topic, several case studies are considered to illustrate the design methodology. Also, integrated examples in 1.2um and 0.35um CMOS technologies are reported to verify the good agreement between design equations and experimental data. The resulting analog circuit topologies exhibit very low-voltage (i.e. 1V) and low-power (few tenths of uA) capabilities. Apart from these specific design examples, a real industrial application in the field of hearing aids is also presented as the main demonstrator of all the proposed basic building blocks. This system-on-chip exhibits true 1V operation, high flexibility through digital programmability and very low-power consumption (about 300uA including the Class-D amplifier). As a result, the reported ASIC can meet the specifications of a complete family of common hearing aid models. In conclusion, this book is addressed to both industry ASIC designers who can apply its contents to the synthesis of very low-power systems-on-chip in standard CMOS technologies, as well as to the teachers of modern circuit design in electronic engineering.

Download or read book Ultra low Power and Ultra low Voltage RF CMOS Circuits and System Design Techniques written by Mahdi Parvizi and published by . This book was released on 2016 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: "The main focus of this thesis is to mitigate circuit design challenges under ultra-low power (ULP) and ultra-low voltage (ULV) conditions to implement ULP and ULV circuits and systems suitable for low power wireless sensor networks operating from the energy scavenged from the environment. The design of power ecient transceivers requires careful optimization at the circuit level. ULV circuit design challenges are fully investigated in this work to address its importance in low power transceivers operating with energy harvesting. It is shown that ULV supply has severe impacts on the performance of a MOS transistor. New solutions like forward body biasing, new biasing scheme optimized for ULP and ULV design, current-reuse and etc. are introduced to mitigate these performance degradations.Several ULP and ULV wideband RF low noise amplifiers (LNAs) are designed and fabricated to prove the concept. The rst one is a resistive shunt-feedback LNA fabricated in a 90-nm TSMC CMOS using multiple ULP and ULV techniques. This prototype achieves high gure of merit (FoM) while consuming sub-mW power from a 0.5-V supply. The secondone is an inductorless, wideband LNA implemented in an IBM 0.13-um CMOS technology which uses a current-reused tunable active shunt-feedback for input impedance matching.Employing ULP design techniques, this LNA consumes only 400-W while illustrating high FoM. The third fabricated LNA, also implemented in an IBM 0.13-um CMOS, utilizes multiple ULP and ULV design techniques which lead to the best FoM in the literature to the best of the author knowledge, with only 0.25-mW power from a 0.5-V supply. Finally, aUWB current-reuse noise cancelling LNA is implemented that achieves high performance while consuming 410-W from a 0.4-V supply which makes it suitable for systems operating from energy harvesting.As a low power system-level solution, impulse radio ultra-wideband (IR-UWB) technology with short pulses in the time domain which allows the transceiver to be duty cycled, is considered for ULP wireless sensor networks. In this work, a non-coherent chirp-FSK IR-UWB receiver based on continuous time slicing and low power injection locked clock recovery is implemented. The RF front-end of the receiver is implemented in an IBM 0.13m CMOS.It achieves a tuned voltage gain of 20-30-dB with a NF of 7-dB and the static power consumption of only 1.75-mW from a 0.5-V supply voltage. Overall, the proposed techniques, circuits and system improve the power eciency both at circuit and system level and are suitable for ULP and ULV applications such as energy scavenged wireless sensor networks." --

Download or read book Low voltage Analog CMOS Architectures and Design Methods written by Kent Downing Layton and published by . This book was released on 2007 with total page 134 pages. Available in PDF, EPUB and Kindle. Book excerpt: This dissertation develops design methods and architectures which allow analog circuits to operate at VT + 2Vds, sat, the minimum supply for CMOS circuits with all transistors in the active region where Vds, sat is the drain to source saturation voltage of a MOS transistor. Techniques which meet this criteria for rail-to-rail input stages, gain enhancement stages, and output stages are discussed and developed. These techniques are used to design four fully-differential rail-to-rail amplifiers. The highest gain is shown to be attained using a drain voltage equalization (DVE) or active-bootstrapping technique which produces more than 100dB of gain in a two stage amplifier with a bulk-driven input pair while showing no bandwidth degradation when compared to amplifier architectures with similar biasing. The low voltage design techniques are extended to switching and sampling circuits. A 10-bit digital to analog converter (DAC) and a 10-bit analog to digital converter (ADC) are designed and fabricated in a 0.35(m)m dual-well CMOS process to prove the developed design methods, architectures, and techniques. The 10-bit DAC operates at 1MSPS with near rail-to-rail differential output operation with a 700mV supply voltage. This supply voltage, which is 150mV lower than the VT+2Vds, sat limit, is attained by using a bulk driven threshold voltage lowering technique. The ADC design is a fully-differential pipelined 10-bit converter that operates at 500kSPS with a full scale input range equal to the supply voltage and can operate at supply voltages as low as 650mV, 200mV below the VT + 2Vds, sat limit. The design methods and architectures can be used in advanced processes to maintain gain and minimize supply voltage. These designs show a minimum supply improvement over previously published designs and prove the efficacy of the design architectures and techniques presented in this dissertation.

Download or read book Designing CMOS Circuits for Low Power written by Dimitrios Soudris and published by Springer. This book was released on 2010-10-29 with total page 0 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book is the fourth in a series on novel low power design architectures, methods and design practices. It results from of a large European project started in 1997, whose goal is to promote the further development and the faster and wider industrial use of advanced design methods for reducing the power con sumption of electronic systems. Low power design became crucial with the wide spread of portable infor mation and communication terminals, where a small battery has to last for a long period. High performance electronics, in addition, suffers from a per manent increase of the dissipated power per square millimeter of silicon, due to the increasing clock-rates, which causes cooling and reliability problems or otherwise limits the performance. The European Union's Information Technologies Programme 'Esprit' did therefore launch a 'Pilot action for Low Power Design', which eventually grew to 19 R&D projects and one coordination project, with an overall budget of 14 million EURO. It is meanwhile known as European Low Power Initiative for Electronic System Design (ESD-LPD) and will be completed in the year 2002. It involves to develop or demonstrate new design methods for power reduction, while the coordination project takes care that the methods, experiences and results are properly documented and publicised.

Download or read book Architectures and Synthesizers for Ultra low Power Fast Frequency Hopping WSN Radios written by Emanuele Lopelli and published by Springer Science & Business Media. This book was released on 2010-11-19 with total page 241 pages. Available in PDF, EPUB and Kindle. Book excerpt: Wireless sensor networks have the potential to become the third wireless revolution after wireless voice networks in the 80s and wireless data networks in the late 90s. Unfortunately, radio power consumption is still a major bottleneck to the wide adoption of this technology. Different directions have been explored to minimize the radio consumption, but the major drawback of the proposed solutions is a reduced wireless link robustness. The primary goal of Architectures and Synthesizers for Ultra-low Power Fast Frequency-Hopping WSN Radios is to discuss, in detail, existing and new architectural and circuit level solutions for ultra-low power, robust, uni-directional and bi-directional radio links. Architectures and Synthesizers for Ultra-low Power Fast Frequency-Hopping WSN Radios guides the reader through the many system, circuit and technology trade-offs he will be facing in the design of communication systems for wireless sensor networks. Finally, this book, through different examples realized in both advanced CMOS and bipolar technologies opens a new path in the radio design, showing how radio link robustness can be guaranteed by techniques that were previously exclusively used in radio systems for middle or high end applications like Bluetooth and military communications while still minimizing the overall system power consumption.

Download or read book Low Voltage CMOS Operational Amplifiers written by Satoshi Sakurai and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 266 pages. Available in PDF, EPUB and Kindle. Book excerpt: Low-Voltage CMOS Operational Amplifiers: Theory, Design and Implementation discusses both single and two-stage architectures. Opamps with constant-gm input stage are designed and their excellent performance over the rail-to-rail input common mode range is demonstrated. The first set of CMOS constant-gm input stages was introduced by a group from Technische Universiteit, Delft and Universiteit Twente, the Netherlands. These earlier versions of circuits are discussed, along with new circuits developed at the Ohio State University. The design, fabrication (MOSIS Tiny Chips), and characterization of the new circuits are now complete. Basic analog integrated circuit design concepts should be understood in order to fully appreciate the work presented. However, the topics are presented in a logical order and the circuits are explained in great detail, so that Low-Voltage CMOS Operational Amplifiers can be read and enjoyed by those without much experience in analog circuit design. It is an invaluable reference book, and may be used as a text for advanced courses on the subject.

Download or read book Low Power Design Techniques and CAD Tools for Analog and RF Integrated Circuits written by Piet Wambacq and published by Taylor & Francis US. This book was released on 2001-07-31 with total page 332 pages. Available in PDF, EPUB and Kindle. Book excerpt: This unique book provides an overview of the current state of the art and very recent research results that have been achieved as part of the Low-Power Initiative of the European Union, in the field of analogue, RF and mixed-signal design methodologies and CAD tools.

Download or read book Low Power Digital CMOS Design written by Anantha P. Chandrakasan and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 419 pages. Available in PDF, EPUB and Kindle. Book excerpt: Power consumption has become a major design consideration for battery-operated, portable systems as well as high-performance, desktop systems. Strict limitations on power dissipation must be met by the designer while still meeting ever higher computational requirements. A comprehensive approach is thus required at all levels of system design, ranging from algorithms and architectures to the logic styles and the underlying technology. Potentially one of the most important techniques involves combining architecture optimization with voltage scaling, allowing a trade-off between silicon area and low-power operation. Architectural optimization enables supply voltages of the order of 1 V using standard CMOS technology. Several techniques can also be used to minimize the switched capacitance, including representation, optimizing signal correlations, minimizing spurious transitions, optimizing sequencing of operations, activity-driven power down, etc. The high- efficiency of DC-DC converter circuitry required for efficient, low-voltage and low-current level operation is described by Stratakos, Sullivan and Sanders. The application of various low-power techniques to a chip set for multimedia applications shows that orders-of-magnitude reduction in power consumption is possible. The book also features an analysis by Professor Meindl of the fundamental limits of power consumption achievable at all levels of the design hierarchy. Svensson, of ISI, describes emerging adiabatic switching techniques that can break the CV2f barrier and reduce the energy per computation at a fixed voltage. Srivastava, of AT&T, presents the application of aggressive shut-down techniques to microprocessor applications.

Download or read book Low Power CMOS Design for Wireless Transceivers written by Alireza Zolfaghari and published by Springer Science & Business Media. This book was released on 2013-03-09 with total page 118 pages. Available in PDF, EPUB and Kindle. Book excerpt: This comprehensive treatment of the challenges in low-power RF CMOS design deals with the design and implementation of low- power wireless transceivers in a standard digital CMOS process. It addresses trade-offs and techniques that improve performance, from the component level to the architectural level.