Download or read book Architectural and Operating System Support for Inexpensive Efficient Shared Memory written by Leonidas I. Kontothanassis and published by . This book was released on 1996 with total page 169 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Architectural and Operating System Support for Virtual Memory written by Abhishek Bhattacharjee and published by Springer Nature. This book was released on 2022-05-31 with total page 168 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides computer engineers, academic researchers, new graduate students, and seasoned practitioners an end-to-end overview of virtual memory. We begin with a recap of foundational concepts and discuss not only state-of-the-art virtual memory hardware and software support available today, but also emerging research trends in this space. The span of topics covers processor microarchitecture, memory systems, operating system design, and memory allocation. We show how efficient virtual memory implementations hinge on careful hardware and software cooperation, and we discuss new research directions aimed at addressing emerging problems in this space. Virtual memory is a classic computer science abstraction and one of the pillars of the computing revolution. It has long enabled hardware flexibility, software portability, and overall better security, to name just a few of its powerful benefits. Nearly all user-level programs today take for granted that they will have been freed from the burden of physical memory management by the hardware, the operating system, device drivers, and system libraries. However, despite its ubiquity in systems ranging from warehouse-scale datacenters to embedded Internet of Things (IoT) devices, the overheads of virtual memory are becoming a critical performance bottleneck today. Virtual memory architectures designed for individual CPUs or even individual cores are in many cases struggling to scale up and scale out to today's systems which now increasingly include exotic hardware accelerators (such as GPUs, FPGAs, or DSPs) and emerging memory technologies (such as non-volatile memory), and which run increasingly intensive workloads (such as virtualized and/or "big data" applications). As such, many of the fundamental abstractions and implementation approaches for virtual memory are being augmented, extended, or entirely rebuilt in order to ensure that virtual memory remains viable and performant in the years to come.
Download or read book Architectural Support for Single Address Space Operating Systems written by Eric J. Koldinger and published by . This book was released on 1992 with total page 13 pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: "Recent microprocessor announcements show a trend toward wide-address computers: architectures that support 64 bits of virtual address space. Such architectures facilitate fundamentally new operating system organizations that promote efficient data sharing and cooperation, both between complex applications and between parts of the operating system itself. One such organization is the single address space operating system, in which all the processes run within a single global virtual address space; protection is provided not through conventional address space boundaries, but through protection domains that dictate which pages of the global address space a process can reference. This paper focuses on the architectural implications of single address space operating systems, specificially the interaction between the memory system architecture and the operating system's use of addressing and protection. Our purpose is to explore certain architectural opportunities created by single address space systems by evaluating two protection models that support them. The first provides protection on a per-page, per-domain basis; we define the protection lookaside buffer, a hardware structure that implements this model. The second provides protection on a page-group basis; this model is implemented in the Hewlett-Packard PA-RISC architecture."
Download or read book American Doctoral Dissertations written by and published by . This book was released on 1995 with total page 896 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Communication and Architectural Support for Network Based Parallel Computing written by Dhabaleswar K. Panda and published by Springer Science & Business Media. This book was released on 1997-01-24 with total page 292 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book constitutes the refereed proceedings of the First International Workshop on Communication and Architectural Support for Network-Based Parallel Computing, CANPC'97, held in San Antonio, Texas, USA, in February 1997. The 19 revised full papers presented were carefully selected from a total of 36 submissions. Among the topics addressed are processor/network interfaces, communication protocols, high-performance network technology, operating systems and architectural issues, and load balancing techniques. All in all, the papers competently describe the state-of-the-art for network-based computing systems.
Download or read book Cooperative System Software and Architectural Mechanisms for Efficient Distributed Shared Memory Multiprocessing written by Chen-Chi Kuo and published by . This book was released on 1999 with total page 242 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Distributed Shared Memory written by Jelica Protic and published by John Wiley & Sons. This book was released on 1997-08-10 with total page 384 pages. Available in PDF, EPUB and Kindle. Book excerpt: The papers present in this text survey both distributed shared memory (DSM) efforts and commercial DSM systems. The book discusses relevant issues that make the concept of DSM one of the most attractive approaches for building large-scale, high-performance multiprocessor systems. The authors provide a general introduction to the DSM field as well as a broad survey of the basic DSM concepts, mechanisms, design issues, and systems. The book concentrates on basic DSM algorithms, their enhancements, and their performance evaluation. In addition, it details implementations that employ DSM solutions at the software and the hardware level. This guide is a research and development reference that provides state-of-the art information that will be useful to architects, designers, and programmers of DSM systems.
Download or read book Essentials of Computer Organization and Architecture written by Linda Null and published by Jones & Bartlett Learning. This book was released on 2023-04-13 with total page 895 pages. Available in PDF, EPUB and Kindle. Book excerpt: Essentials of Computer Organization and Architecture focuses on the function and design of the various components necessary to process information digitally. This title presents computing systems as a series of layers, taking a bottom–up approach by starting with low-level hardware and progressing to higher-level software. Its focus on real-world examples and practical applications encourages students to develop a “big-picture” understanding of how essential organization and architecture concepts are applied in the computing world. In addition to direct correlation with the ACM/IEEE guidelines for computer organization and architecture, the text exposes readers to the inner workings of a modern digital computer through an integrated presentation of fundamental concepts and principles.
Download or read book Essentials of Computer Organization and Architecture written by Linda Null and published by Jones & Bartlett Learning. This book was released on 2014-02-12 with total page 945 pages. Available in PDF, EPUB and Kindle. Book excerpt: Updated and revised, The Essentials of Computer Organization and Architecture, Third Edition is a comprehensive resource that addresses all of the necessary organization and architecture topics, yet is appropriate for the one-term course.
Download or read book Architectural Support for Efficient Virtual Memory on Big memory Systems written by Binh Quang Pham and published by . This book was released on 2016 with total page 116 pages. Available in PDF, EPUB and Kindle. Book excerpt: Virtual memory is a powerful and ubiquitous abstraction for managing memory. How- ever, virtual memory suffers a performance penalty for these benefits, namely when translating program virtual addresses to system physical addresses. This overhead had been limited to 5-15% of system runtime by using a set of sophisticated hardware so- lutions, but has increased to 20-50% for many scenarios, including running workloads with large memory footprints and poor access locality or using deeper software stacks. My thesis aims to solve this problem so that the memory systems can continue to scale without being hamstrung by the virtual memory system. We observe that while operating systems (OS) and hypervisors have a rich set of components in allocating memory, the hardware address translation unit only maintains a rigid and limited view of this ecosystem. Therefore, we seek for patterns inherently present in the memory allocation mechanisms to guide us in designing a more intelligent address translation unit. First, we realize that OS memory allocators and program faulting sequence tend to produce contiguous or nearby mappings between virtual and physical pages. We propose Coalesced TLB and Clustered TLB designs to exploit these patterns accordingly. Once detected, the related mappings are stored in a single TLB entry to increase the TLB's reach. Our designs help reduce TLB misses substantially and improve performance as a result. Second, we see that there are often tradeoffs between reducing address translation overheard and improving resource consolidation in virtualized environments. For exam- ple, large pages are often used to mitigate the high cost of two-dimensional page walks, but hypervisors usually break large pages into small pages for easier sharing guests memory. When that happens, the majority of those small pages still remain aligned. Based on this observation, we propose a speculative TLB technique to regain almost all performance loss caused by breaking large pages while running highly consolidated virtualized systems.
Download or read book Hardware and Operating System Design for a Cluster based Scalable Shared Memory System written by International Business Machines Corporation. Research Division and published by . This book was released on 1998 with total page 44 pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: "This paper describes PRISM, a hardware cache coherent distributed shared memory (DSM) architecture based on a cluster of SMP nodes, where each node runs an independent operating system kernel. The architecture relies on tight coordination between the hardware and OS to solve the problem of scalability and fault containment in such systems. For scalability, the hardware and OS interactions are highly localized to a node, even for potentially global operations such as page faults and page migration. Inherently global operations, such as the mapping of global objects, amortize their cost over a large number of pages. For fault containment, the system avoids using physical addresses as global names to prevent wild writes on a malfunctioning node from affecting other nodes. For performance, the system allows efficient and flexible software control over memory and caching behavior (e.g., CC-NUMA vs Simple-COMA) of each page of memory. Moreover, the control is performed independently at each node. All of these features are provided within a single unified system design. We are currently implementing the system and find its complexity to be equivalent to that of existing hardware DSM systems. We discuss the features of SMP nodes that are vital for building efficient DSM systems out of SMP clusters. We also discuss the features of the cluster interconnect that are necessary for performance and for avoiding deadlocks. We present simulation results that demonstrate performance benefits of the architecture over previous designs."
Download or read book Architecture Support for Operating System Survivability and Efficient Bulk Memory Copying and Initialization written by and published by . This book was released on 2001 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: Operating System (OS) is the fundamental layer that provides and mediates accesses to a computer systemÃØâ'Ơâ"Øs resources for user application programs. The ever increasing size and complexity of the OS code bring the inevitable increase in the number of security vulnerabilities that can be exploited by attackers. A successful security attack on the OS has a profound impact because the OS runs at the highest processor privilege level. An OS kernel crash can freeze the entire system, terminate all running processes, and cause a long period of system unavailability. Given the increasing trend of OS security faults and the dire consequences of successful OS kernel attacks, we strive to make the OS kernel survivable, i.e. able to keep normal system operation despite security faults. This works makes several contributions. First, we propose an OS survivability scheme that consists of three inseparable components: (1) Security attack detection mechanism, (2) security fault isolation mechanism, and (3) recovery mechanism that resumes normal system operation. We analyze the underlying performance requirement for each of the components and propose simple but carefully-designed architecture support to reduce the performance overhead. When testing with real world security attacks, our survivability scheme automatically isolates the security faults from corrupting the kernel state or affecting other executing processes, recovers the kernel state and resumes execution. Second, in order to overcome the performance overhead incurred by the checkpointing- based recovery mechanism that extensively uses bulk memory copying and initialization operations, we propose efficient architecture support for improving bulk memory copying and initialization performance. While many of the current systems rely on a loop of loads and stores, or use a single copying instruction to perform memory copying, in this work we demonstrate that the key to significantly improving the performance is removin.
Download or read book Architectural Support to Exploit Commutativity in Shared memory Systems written by Guowei Zhang (S.M.) and published by . This book was released on 2016 with total page 64 pages. Available in PDF, EPUB and Kindle. Book excerpt: Parallel systems are limited by the high costs of communication and synchronization. Exploiting commutativity has historically been a fruitful avenue to reduce traffic and serialization. This is because commutative operations produce the same final result regardless of the order they are performed in, and therefore can be processed concurrently and without communication. Unfortunately, software techniques that exploit commutativity, such as privatization and semantic locking, incur high runtime overheads. These overheads offset the benefit and thereby limit the applicability of software techniques. To avoid high overheads, it would be ideal to exploit commutativity in hardware. In fact, hardware already provides much of the functionality that is required to support commutativity For instance, private caches can buffer and coalesce multiple updates. However, current memory hierarchies can understand only reads and writes, which prevents hardware from recognizing and accelerating commutative operations. The key insight this thesis develops is that, with minor hardware modifications and minimal extra complexity, cache coherence protocols, the key component of communication and synchronization in shared-memory systems, can be extended to allow local and concurrent commutative operations. This thesis presents two techniques that leverage this insight to exploit commutativity in hardware. First, Coup provides architectural support for a limited number of single-instruction commutative updates, such as addition and bitwise logical operations. CouP allows multiple private caches to simultaneously hold update-only permission to the same cache line. Caches with update-only permission can locally buffer and coalesce updates to the line, but cannot satisfy read requests. Upon a read request, Coup reduces the partial updates buffered in private caches to produce the final value. Second, CoMMTM is a commutativity-aware hardware transactional memory (HTM) that supports an even broader range of multi-instruction, semantically commutative operations, such as set insertions and ordered puts. COMMTM extends the coherence protocol with a reducible state tagged with a user-defined label. Multiple caches can hold a given line in the reducible state with the same label, and transactions can implement arbitrary user-defined commutative operations through labeled loads and stores. These commutative operations proceed concurrently, without triggering conflicts or incurring any communication. A non-commutative operation (e.g., a conventional load or store) triggers a user-defined reduction that merges the different cache lines and may abort transactions with outstanding reducible updates. CouP and CoMMTM reduce communication and synchronization in many challenging parallel workloads. At 128 cores, CouP accelerates state-of-the-art implementations of update-heavy algorithms by up to 2.4x, and COMMTM outperforms a conventional eager-lazy HTM by up to 3.4x and reduces or eliminates wasted work due to transactional aborts.
Download or read book Chameleon Shared Memory written by Christopher David Dolen and published by . This book was released on 2008 with total page 142 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Computer Networks Architecture and Applications written by R.V. Raghavan and published by Springer. This book was released on 2013-06-29 with total page 369 pages. Available in PDF, EPUB and Kindle. Book excerpt: Computer Networks, Architecture and Applications covers many aspects of research in modern communications networks for computing purposes.
Download or read book Parallel Computer Architecture written by David Culler and published by Gulf Professional Publishing. This book was released on 1999 with total page 1056 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book outlines a set of issues that are critical to all of parallel architecture--communication latency, communication bandwidth, and coordination of cooperative work (across modern designs). It describes the set of techniques available in hardware and in software to address each issues and explore how the various techniques interact.
