Download or read book Application of Time Redundancy to Concurrent Error Detection in VSLI Circuits written by Haytham H. Hana and published by . This book was released on 1987 with total page 192 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Concurrent Error Detection in Self timed VLSI written by David A. Rennels and published by . This book was released on 1993 with total page 20 pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: "This paper examines architectural techniques for providing concurrent error detection in self-timed VLSI pipelines. Signal pairs from DCVSL self-timed logic are compared with a checker that is composed of a tree of dual-rail (morphic) comparators to detect errors and signal completion. An efficient implementation is shown that compares favorably in speed and area with conventional completion signal generators. The control of the pipeline is then examined, and techniques are described that detect errors in the C-gates and other circuits that provide handshaking control. Based on these studies we have concluded that self- timed logic offers considerable fault-tolerance potential due to its built- in redundancy that can be effectively exploited for error checking."
Download or read book Computer Arithmetic written by Earl E Swartzlander and published by World Scientific. This book was released on 2015-03-17 with total page 486 pages. Available in PDF, EPUB and Kindle. Book excerpt: This is the new edition of the classic book Computer Arithmetic in three volumes published originally in 1990 by IEEE Computer Society Press. As in the original, the book contains many classic papers treating advanced concepts in computer arithmetic, which is very suitable as stand-alone textbooks or complementary materials to textbooks on computer arithmetic for graduate students and research professionals interested in the field. Told in the words of the initial developers, this book conveys the excitement of the creators, and the implementations provide insight into the details necessary to realize real chips. This second volume presents topics on error tolerant arithmetic, digit on-line arithmetic, number systems, and now in this new edition, a topic on implementations of arithmetic operations, all wrapped with an updated overview and a new introduction for each chapter. This volume is part of a 3 volume set: Computer Arithmetic Volume I Computer Arithmetic Volume II Computer Arithmetic Volume III The full set is available for sale in a print-only version. Contents:Error Tolerant ArithmeticOn-Line ArithmeticVLSI Adder ImplementationsVLSI Multiplier ImplementationsFloating-Point VLSI ChipsNumber RepresentationImplementations Readership: Graduate students and research professionals interested in computer arithmetic. Key Features:It reprints the classic papersIt covers advanced arithmetic operationsIt does this in the words of the original creatorsKeywords:Computer Arithmetic;Fault Tolerant;Arithmetic;On-Line Arithmetic;Adder Implementations;Multiplier Implementations;Floating Point Chips;Number Representation;Implementations
Download or read book The Electrical Engineering Handbook written by Wai Kai Chen and published by Elsevier. This book was released on 2004-11-16 with total page 1227 pages. Available in PDF, EPUB and Kindle. Book excerpt: The Electrical Engineer's Handbook is an invaluable reference source for all practicing electrical engineers and students. Encompassing 79 chapters, this book is intended to enlighten and refresh knowledge of the practicing engineer or to help educate engineering students. This text will most likely be the engineer's first choice in looking for a solution; extensive, complete references to other sources are provided throughout. No other book has the breadth and depth of coverage available here. This is a must-have for all practitioners and students! The Electrical Engineer's Handbook provides the most up-to-date information in: Circuits and Networks, Electric Power Systems, Electronics, Computer-Aided Design and Optimization, VLSI Systems, Signal Processing, Digital Systems and Computer Engineering, Digital Communication and Communication Networks, Electromagnetics and Control and Systems.About the Editor-in-Chief...Wai-Kai Chen is Professor and Head Emeritus of the Department of Electrical Engineering and Computer Science at the University of Illinois at Chicago. He has extensive experience in education and industry and is very active professionally in the fields of circuits and systems. He was Editor-in-Chief of the IEEE Transactions on Circuits and Systems, Series I and II, President of the IEEE Circuits and Systems Society and is the Founding Editor and Editor-in-Chief of the Journal of Circuits, Systems and Computers. He is the recipient of the Golden Jubilee Medal, the Education Award, and the Meritorious Service Award from the IEEE Circuits and Systems Society, and the Third Millennium Medal from the IEEE. Professor Chen is a fellow of the IEEE and the American Association for the Advancement of Science.* 77 chapters encompass the entire field of electrical engineering.* THOUSANDS of valuable figures, tables, formulas, and definitions.* Extensive bibliographic references.
Download or read book Fault Tolerant Parallel and Distributed Systems written by Dimiter R. Avresky and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 396 pages. Available in PDF, EPUB and Kindle. Book excerpt: The most important use of computing in the future will be in the context of the global "digital convergence" where everything becomes digital and every thing is inter-networked. The application will be dominated by storage, search, retrieval, analysis, exchange and updating of information in a wide variety of forms. Heavy demands will be placed on systems by many simultaneous re quests. And, fundamentally, all this shall be delivered at much higher levels of dependability, integrity and security. Increasingly, large parallel computing systems and networks are providing unique challenges to industry and academia in dependable computing, espe cially because of the higher failure rates intrinsic to these systems. The chal lenge in the last part of this decade is to build a systems that is both inexpensive and highly available. A machine cluster built of commodity hardware parts, with each node run ning an OS instance and a set of applications extended to be fault resilient can satisfy the new stringent high-availability requirements. The focus of this book is to present recent techniques and methods for im plementing fault-tolerant parallel and distributed computing systems. Section I, Fault-Tolerant Protocols, considers basic techniques for achieving fault-tolerance in communication protocols for distributed systems, including synchronous and asynchronous group communication, static total causal order ing protocols, and fail-aware datagram service that supports communications by time.
Download or read book IEEE Proceedings of the Southeastcon written by and published by . This book was released on 1986 with total page 344 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Design of Systems with Concurrent Error Detection Using Software Redundancy written by Kien Anh Hua and published by . This book was released on 1987 with total page 236 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Application Specific Processors written by Earl E. Swartzlander Jr. and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 266 pages. Available in PDF, EPUB and Kindle. Book excerpt: Application Specific Processors is written for use by engineers who are developing specialized systems (application specific systems). Traditionally, most high performance signal processors have been realized with application specific processors. The explanation is that application specific processors can be tailored to exactly match the (usually very demanding) application requirements. The result is that no `processing power' is wasted for unnecessary capabilities and maximum performance is achieved. A disadvantage is that such processors have been expensive to design since each is a unique design that is customized to the specific application. In the last decade, computer-aided design systems have been developed to facilitate the development of application specific integrated circuits. The success of such ASIC CAD systems suggests that it should be possible to streamline the process of application specific processor design. Application Specific Processors consists of eight chapters which provide a mixture of techniques and examples that relate to application specific processing. The inclusion of techniques is expected to suggest additional research and to assist those who are faced with the requirement to implement efficient application specific processors. The examples illustrate the application of the concepts and demonstrate the efficiency that can be achieved via application specific processors. The chapters were written by members and former members of the application specific processing group at the University of Texas at Austin. The first five chapters relate to specific arithmetic which often is the key to achieving high performance in application specific processors. The next two chapters focus on signal processing systems, and the final chapter examines the interconnection of possibly disparate elements to create systems.
Download or read book A Concurrent Error Detection and Correction Algorithm for Fault tolerant VLSI Arithmetic Array Processors written by Kamran Shokoohi-Kayvan and published by . This book was released on 1985 with total page 284 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Defect and Fault Tolerance in VLSI Systems written by C.H. Stapper and published by Springer Science & Business Media. This book was released on 2013-06-29 with total page 313 pages. Available in PDF, EPUB and Kindle. Book excerpt: Higher circuit densities, increasingly more complex application ohjectives, and advanced packaging technologies have suhstantially increased the need to incorporate defect-tolerance and fault-tolerance in the design of VLSI and WSI systems. The goals of defect-tolerance and fault-tolerance are yield enhancement and improved reliahility. The emphasis on this area has resulted in a new field of interdisciplinary scientific research. I n fact, advanced methods of defect/fault control and tolerance are resulting in enhanced manufacturahility and productivity of integrated circuit chips, VI.SI systems, and wafer scale integrated circuits. In 1987, Dr. W. Moore organized an "International Workshop on Designing for Yield" at Oxford University. Edited papers of that workshop were published in reference [II. The participants in that workshop agreed that meetings of this type should he con tinued. preferahly on a yearly hasis. It was Dr. I. Koren who organized the "IEEE Inter national Workshop on Defect and Fault Tolerance in VLSI Systems" in Springfield Massachusetts the next year. Selected papers from that workshop were puhlished as the first volume of this series [21.
Download or read book Advanced Simulation and Test Methodologies for VLSI Design written by G. Russell and published by Springer Science & Business Media. This book was released on 1989-02-28 with total page 406 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Design of Concurrent Error Detection Systems Using Software Redundancy written by Kien A. Hua and published by . This book was released on 1985 with total page 21 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Concurrent Computations written by Stuart K. Tewksbury and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 719 pages. Available in PDF, EPUB and Kindle. Book excerpt: The 1987 Princeton Workshop on Algorithm, Architecture and Technology Issues for Models of Concurrent Computation was organized as an interdisciplinary work shop emphasizing current research directions toward concurrent computing systems. With participants from several different fields of specialization, the workshop cov ered a wide variety of topics, though by no means a complete cross section of issues in this rapidly moving field. The papers included in this book were prepared for the workshop and, taken together, provide a view of the broad range of issues and alternative directions being explored. To organize the various papers, the book has been divided into five parts. Part I considers new technology directions. Part II emphasizes underlying theoretical issues. Communication issues, which are ad dressed in the majority of papers, are specifically highlighted in Part III. Part IV includes papers stressing the fault tolerance and reliability of systems. Finally, Part V includes systems-oriented papers, where the system ranges from VLSI circuits through powerful parallel computers. Much of the initial planning of the workshop was completed through an informal AT&T Bell Laboratories group consisting of Mehdi Hatamian, Vijay Kumar, Adri aan Ligtenberg, Sailesh Rao, P. Subrahmanyam and myself. We are grateful to Stuart Schwartz, both for the support of Princeton University and for his orga nizing local arrangements for the workshop, and to the members of the organizing committee, whose recommendations for participants and discussion topics were par ticularly helpful. A. Rosenberg, and A. T.
Download or read book Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems written by Duncan Moore Henry Walker and published by Institute of Electrical & Electronics Engineers(IEEE). This book was released on 1992 with total page 360 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book VLSI SoC Design and Engineering of Electronics Systems Based on New Computing Paradigms written by Nicola Bombieri and published by Springer. This book was released on 2019-06-25 with total page 281 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book contains extended and revised versions of the best papers presented at the 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, held in Verona, Italy, in October 2018. The 13 full papers included in this volume were carefully reviewed and selected from the 27 papers (out of 106 submissions) presented at the conference. The papers discuss the latest academic and industrial results and developments as well as future trends in the field of System-on-Chip (SoC) design, considering the challenges of nano-scale, state-of-the-art and emerging manufacturing technologies. In particular they address cutting-edge research fields like heterogeneous, neuromorphic and brain-inspired, biologically-inspired, approximate computing systems.
Download or read book Concurrent Error Detection in Finite Field Arithmetic Operations written by Siavash Bayat-Sarmadi and published by . This book was released on 2008 with total page 175 pages. Available in PDF, EPUB and Kindle. Book excerpt: With significant advances in wired and wireless technologies and also increased shrinking in the size of VLSI circuits, many devices have become very large because they need to contain several large units. This large number of gates and in turn large number of transistors causes the devices to be more prone to faults. These faults specially in sensitive and critical applications may cause serious failures and hence should be avoided. On the other hand, some critical applications such as cryptosystems may also be prone to deliberately injected faults by malicious attackers. Some of these faults can produce erroneous results that can reveal some important secret information of the cryptosystems. Furthermore, yield factor improvement is always an important issue in VLSI design and fabrication processes. Digital systems such as cryptosystems and digital signal processors usually contain finite field operations. Therefore, error detection and correction of such operations have become an important issue recently. In most of the work reported so far, error detection and correction are applied using redundancies in space (hardware), time, and/or information (coding theory). In this work, schemes based on these redundancies are presented to detect errors in important finite field arithmetic operations resulting from hardware faults. Finite fields are used in a number of practical cryptosystems and channel encoders/decoders. The schemes presented here can detect errors in arithmetic operations of finite fields represented in different bases, including polynomial, dual and/or normal basis, and implemented in various architectures, including bit-serial, bit-parallel and/or systolic arrays.
Download or read book Proceedings written by and published by . This book was released on 2003 with total page 632 pages. Available in PDF, EPUB and Kindle. Book excerpt:
