Download or read book Parallel Simulation on Shared Memory Multiprocessors written by Rassul Ayani and published by . This book was released on 1989 with total page 146 pages. Available in PDF, EPUB and Kindle. Book excerpt: These algorithms are conservative and deadlock free. In addition, they do neither lead to any memory overflow nor require any nonzero minimum service time for the nodes. The algorithms have been implemented on a shared memory multiprocessor, and the achieved performance is reported."
Download or read book Parallel Discrete Event Simulation on Shared Memory Multiprocessors written by Pavlos Konas and published by . This book was released on 1991 with total page 226 pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: "This thesis presents the implementation and the performance study of various parallel discrete event simulation (PDES) methods on a centralized shared memory machine (an Alliant FX-80). One of the most important features of this implementation is that it provides a single user interface for all the implemented methods. These methods include the Chandy-Misra paradigm with deadlock avoidance (using a shared memory model), the Time Warp approach with direct, aggressive and lazy cancellation, and a hybrid approach, which exploits the parallelism available at each point in simulated time
Download or read book Simulation Analysis of Data Sharing in Shared Memory Multiprocessors written by Susan J. Eggers and published by . This book was released on 1989 with total page 352 pages. Available in PDF, EPUB and Kindle. Book excerpt: A cross-protocol comparison provided empirical evidence of the performance loss caused by increasing block size in write- invalidate protocols and cache size in write-broadcast. It then measured the extent to which read broadcast
Download or read book Parallel Architectural Simulations on Shared memory Multiprocessors written by Pavlos Konas and published by . This book was released on 1994 with total page 506 pages. Available in PDF, EPUB and Kindle. Book excerpt: The ever increasing size and complexity of computer systems made possible by the rapid advances in VLSI technology and computer architecture, have resulted in simulations which require excessive amounts of processing power and memory. One way to meet these requirements of detailed computer simulations is to execute them on multiprocessors. This dissertation focuses on the development of a parallel method for the fast and efficient execution of architectural simulations on shared-memory multiprocessors. We identify five issues which are important to the performance of a parallel simulator, and we address each of them separately as well as in coordination with one another. First, we study the behavior and examine the parallelism available in architectural and logic-level simulations. The results of our study show that such designs do contain significant inherent parallelism. However, for a synchronous method to be efficient in their simulations it needs to exploit the clock effect and to handle well the simulation steps with limited parallelism. In addition, traces of parallelism are shown to be important in describing the dynamic behavior of the simulation parallelism, and in identifying the limitations of parallel simulation methods. Second, we present a synchronous parallel simulation method (SPaDES) which improves upon existing synchronous methods in many ways, and performs well on both centralized memory and on NUMA multiprocessors. We also present AdvanCE SPaDES, in which an aggressive mechanism is combined with a nonblocking barrier to facilitate the extraction and exploitation of parallelism in situations where the simulation does not contain enough inherent parallelism for the processors to exploit. AdvanCE SPaDES improves the performance of the parallel simulator, especially when the original method may not perform so well. Third, we present sensitive partitioning, a method which accounts for the synchronous nature of a SPaDES simulator, as well as for characteristics of architectural and logic-level designs. Using several metrics we compare the performance of sensitive partitioning to other widely used partitioning methods in the parallel simulation of logic-level designs. The results of our study show that sensitive partitioning performs well in the partitioning of the examined designs, and that its performance can be further improved by utilizing more accurate estimations of the design characteristics. Fourth, we present a novel approach to processor self-scheduling which accounts for characteristics of the simulation method and of the target simulation area. The presented approach combines the advantages of an efficient data structure with inexpensive and easily accessible affinity information to achieve an efficient parallel execution. A study of the presented approach shows that it provides better performance than simpler approaches which utilize less affinity information. Finally, we discuss the importance of an optimizing compiler in improving the efficiency of a parallel simulator. We argue that information available to the compiler during the analysis of the simulated system can significantly improve the efficiency of the parallel simulator, and we present optimizations which are important in SPaDES simulations.
Download or read book Scalable Shared Memory Multiprocessors written by Michel Dubois and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 326 pages. Available in PDF, EPUB and Kindle. Book excerpt: The workshop on Scalable Shared Memory Multiprocessors took place on May 26 and 27 1990 at the Stouffer Madison Hotel in Seattle, Washington as a prelude to the 1990 International Symposium on Computer Architecture. About 100 participants listened for two days to the presentations of 22 invited The motivation for this workshop was to speakers, from academia and industry. promote the free exchange of ideas among researchers working on shared-memory multiprocessor architectures. There was ample opportunity to argue with speakers, and certainly participants did not refrain a bit from doing so. Clearly, the problem of scalability in shared-memory multiprocessors is still a wide-open question. We were even unable to agree on a definition of "scalability". Authors had more than six months to prepare their manuscript, and therefore the papers included in this proceedings are refinements of the speakers' presentations, based on the criticisms received at the workshop. As a result, 17 authors contributed to these proceedings. We wish to thank them for their diligence and care. The contributions in these proceedings can be partitioned into four categories 1. Access Order and Synchronization 2. Performance 3. Cache Protocols and Architectures 4. Distributed Shared Memory Particular topics on which new ideas and results are presented in these proceedings include: efficient schemes for combining networks, formal specification of shared memory models, correctness of trace-driven simulations,synchronization, various coherence protocols, .
Download or read book Shared Memory Multiprocessing written by Norihisa Suzuki and published by MIT Press. This book was released on 1992 with total page 534 pages. Available in PDF, EPUB and Kindle. Book excerpt: Shared memory multiprocessors are becoming the dominant architecture for small-scale parallel computation. This book is the first to provide a coherent review of current research in shared memory multiprocessing in the United States and Japan. It focuses particularly on scalable architecture that will be able to support hundreds of microprocessors as well as on efficient and economical ways of connecting these fast microprocessors. The 20 contributions are divided into sections covering the experience to date with multiprocessors, cache coherency, software systems, and examples of scalable shared memory multiprocessors.
Download or read book Simulation of a Shared Memory Parallel Processing System written by Eugene E. Van Valkenburgh and published by . This book was released on 1988 with total page 278 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Scalable Shared Memory Multiprocessing written by Daniel E. Lenoski and published by Elsevier. This book was released on 2014-06-28 with total page 364 pages. Available in PDF, EPUB and Kindle. Book excerpt: Dr. Lenoski and Dr. Weber have experience with leading-edge research and practical issues involved in implementing large-scale parallel systems. They were key contributors to the architecture and design of the DASH multiprocessor. Currently, they are involved with commercializing scalable shared-memory technology.
Download or read book Techniques for Efficient Shared memory Parallel Simulation written by University of Washington. Department of Computer Science and published by . This book was released on 1988 with total page 17 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Synchronous Parallel Discrete Event Simulation on Shared memory Multiprocessors written by Pavlos Konas and published by . This book was released on 1991 with total page 23 pages. Available in PDF, EPUB and Kindle. Book excerpt: The results show that the SPDES method alleviates bottlenecks usually attributed to synchronous methods, and thus we are able to efficiently exploit most of the parallelism available in the simulation of synchronous architectural designs.
Download or read book Fast High level Simulation of Shared memory Multiprocessor Systems written by University of Michigan. Dept. of Electrical Engineering and Computer Science. Computer Science and Engineering Division and published by . This book was released on 1990 with total page 26 pages. Available in PDF, EPUB and Kindle. Book excerpt: The accuracy and overhead of SIMPLE depend on the frequency of events generated during the simulation. Experimental results show that SIMPLE has high accuracy and low simulation overhead when the speedup of the simulated parallel program on the target system is high. A prototype of parallel SIMPLE currently runs on the Sequent Balance. Preliminary results show that it can achieve a speedup of thirteen with twenty host processors if adequate parallelism is available in a parallel program."
Download or read book Efficient Parallel Simulation for Designing Multiprocessor Systems written by Jia-Jen Lin and published by . This book was released on 1992 with total page 394 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book PARASPICE A Parallel Direct Circuit Simulator for Shared memory Multiprocessors written by Gung-Chung Yang and published by . This book was released on 1990 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: A general approach to parallelizing direct method circuit simulation has been developed via novel algorithms. The approach extracts parallel tasks at the algorithmic level for the three most compute-intensive modules: device model evaluation (LOAD), direct solution of sparse linear systems (SOLVE), and local truncation error estimation (TRUNC), which account for at least 95 percent of the total job time. Therefore, it is suitable for a wide range of shared-memory multiprocessors. The implementation of the approach in SPICE2 resulted in a portable parallel direct circuit simulator, PARASPICE. The superior performance of PARASPICE is demonstrated on an eight-CE Alliant FX/80 using a number of benchmark circuits. The success of PARASPICE lies particularly in the SOLVE module, where the solution of a sequence of structurally identical sparse matrices are required. In this dissertation, a class of new algorithms has been systematically developed via a unified model for parallel sparse matrix computation. This model, which explores the parallelism issue in the pivoting schemes, extracts parallel tasks from the solution procedure by exploiting the sparse structure of the matrix. These algorithms have been implemented in DSPACK, a software package for the direct solution of general sparse matrices. Experiments with DSPACK on the Boeing-Harwell collection of benchmark matrices have shown high overall speedup. DSPACK has been successfully used as a workbench to design parallel sparse solvers for circuit simulation.
Download or read book An Address Trace Generator for Trace driven Simulation of Shared Memory Multiprocessors written by Frank Lacy and published by . This book was released on 1988 with total page 28 pages. Available in PDF, EPUB and Kindle. Book excerpt: This paper presents an extension to the standard trace- driven procedure that allows for the examination of parallel programs on parallel architectures. To demonstrate the procedure, an example simulation is performed to investigate the changes resulting from modifying the architecture of the Sequent multiprocessor. The trace-driven simulation process is shown to be a very lengthy task, and other methods of predicting performance are explored.
Download or read book Fast Accurate Simulation of Shared Memory Multiprocessors written by Bob Boothe and published by . This book was released on 1993 with total page 16 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Hybrid Memory Management for Parallel Execution of Prolog on Shared Memory Multiprocessors written by University of California, Berkeley. Computer Science Division and published by . This book was released on 1990 with total page 170 pages. Available in PDF, EPUB and Kindle. Book excerpt: With respect to space, we propose a hybrid heap-stack (called ELPS) which is dynamically allocated for more efficient space sharing and interference-free parallel execution. With respect to time, we present a two-tier memory architecture (called the Aquarius-II) with separate synchronization and high-bandwidth memory spaces. A multiprocessor simulation system has been developed to evaluate the performance of ELPS and the Aquarius-II. ELPS incurs an average of 2% overhead (11% without hardware support), while satisfying the memory requirement to keep up with the speedup potential of the parallel execution model.
Download or read book Graph Reduction on Shared memory Multiprocessors written by K. G. Langendoen and published by . This book was released on 1996 with total page 218 pages. Available in PDF, EPUB and Kindle. Book excerpt:
