Download or read book Logic Synthesis Techniques for Reduced Area Implementation of Multilevel Circuits with Concurrent Error Detection written by Stanford University. Computer Systems Laboratory and published by . This book was released on 1994 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Logic Synthesis for Concurrent Error Detection written by Stanford University. Computer Systems Laboratory and published by . This book was released on 1993 with total page 30 pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: "The structure of a circuit determines how the effects of a fault can propagate and hence affects the cost of concurrent error detection. By considering circuit structure during logic optimization, the overall cost of a concurrently checked circuit can be minimized. This report presents a new technique called structure-constrained logic optimization (SCLO) that optimizes a circuit under the constraint that faults in the resulting circuit can produce only a prescribed set of errors. Using SCLO, circuits can be optimized for various concurrent error detection schemes allowing the overall cost for each scheme to be compared. A technique for quickly estimating the size of a circuit under different structural constraints is described. This technique enables rapid exploration of the design space for concurrently checked circuits. A new method for the automated synthesis of self-checking circuit implementations for arbitrary combinational circuits is also presented. It consists of an algorithm that determines the best parity-check code for encoding the output of a given circuit, and then uses SCLO to produce the functional circuit which is augmented with a checker to form a self-checking circuit. This synthesis method provides fully automated design, explores a larger design space than other methods, and uses simple checkers. It has been implemented by making modifications to SIS (an updated version of MIS [Brayton 87a]), and results for several MCNC combinational benchmark circuits are given. In most cases, a substantial reduction in overhead compared to a duplicate-and-compare implementation is achieved."
Download or read book Design and Test Technology for Dependable Systems on chip written by Raimund Ubar and published by IGI Global. This book was released on 2011-01-01 with total page 550 pages. Available in PDF, EPUB and Kindle. Book excerpt: "This book covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC)"--
Download or read book On Line Testing for VLSI written by Michael Nicolaidis and published by Springer Science & Business Media. This book was released on 2013-03-09 with total page 152 pages. Available in PDF, EPUB and Kindle. Book excerpt: Test functions (fault detection, diagnosis, error correction, repair, etc.) that are applied concurrently while the system continues its intended function are defined as on-line testing. In its expanded scope, on-line testing includes the design of concurrent error checking subsystems that can be themselves self-checking, fail-safe systems that continue to function correctly even after an error occurs, reliability monitoring, and self-test and fault-tolerant designs. On-Line Testing for VLSI contains a selected set of articles that discuss many of the modern aspects of on-line testing as faced today. The contributions are largely derived from recent IEEE International On-Line Testing Workshops. Guest editors Michael Nicolaidis, Yervant Zorian and Dhiraj Pradhan organized the articles into six chapters. In the first chapter the editors introduce a large number of approaches with an expanded bibliography in which some references date back to the sixties. On-Line Testing for VLSI is an edited volume of original research comprising invited contributions by leading researchers.
Download or read book Soft Errors in Modern Electronic Systems written by Michael Nicolaidis and published by Springer Science & Business Media. This book was released on 2010-09-24 with total page 331 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides a comprehensive presentation of the most advanced research results and technological developments enabling understanding, qualifying and mitigating the soft errors effect in advanced electronics, including the fundamental physical mechanisms of radiation induced soft errors, the various steps that lead to a system failure, the modelling and simulation of soft error at various levels (including physical, electrical, netlist, event driven, RTL, and system level modelling and simulation), hardware fault injection, accelerated radiation testing and natural environment testing, soft error oriented test structures, process-level, device-level, cell-level, circuit-level, architectural-level, software level and system level soft error mitigation techniques. The book contains a comprehensive presentation of most recent advances on understanding, qualifying and mitigating the soft error effect in advanced electronic systems, presented by academia and industry experts in reliability, fault tolerance, EDA, processor, SoC and system design, and in particular, experts from industries that have faced the soft error impact in terms of product reliability and related business issues and were in the forefront of the countermeasures taken by these companies at multiple levels in order to mitigate the soft error effects at a cost acceptable for commercial products. In a fast moving field, where the impact on ground level electronics is very recent and its severity is steadily increasing at each new process node, impacting one after another various industry sectors (as an example, the Automotive Electronics Council comes to publish qualification requirements on soft errors), research and technology developments and industrial practices have evolve very fast, outdating the most recent books edited at 2004.
Download or read book IEEE VLSI Test Symposium written by and published by . This book was released on 2002 with total page 504 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book 17th IEEE VLSI Test Symposium written by and published by Institute of Electrical & Electronics Engineers(IEEE). This book was released on 1999 with total page 534 pages. Available in PDF, EPUB and Kindle. Book excerpt: The theme of the April 1999 symposium Scaling deeper to submicron: test technology challenges reflects the issues being created by the move toward nanometer technologies. Many creative and novel ideas and approaches to the current and future electronic circuit testing-related problems are explored
Download or read book Proceedings written by and published by . This book was released on 2005 with total page 624 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Logic Synthesis for FSM Based Control Units written by Alexander Barkalov and published by Springer. This book was released on 2010-04-30 with total page 233 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book presents the hardware implementation of control algorithms represented by graph-schemes of algorithm. It includes new methods of logic synthesis and optimization for logic circuits of Mealy and Moore FSMs oriented on both ASIC and FPLD.
Download or read book Advanced Techniques in Logic Synthesis Optimizations and Applications written by Kanupriya Gulati and published by Springer Science & Business Media. This book was released on 2010-11-25 with total page 423 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book covers recent advances in the field of logic synthesis and design, including Boolean Matching, Logic Decomposition, Boolean satisfiability, Advanced Synthesis Techniques and Applications of Logic Design. All of these topics are valuable to CAD engineers working in Logic Design, Logic Optimization, and Verification. Engineers seeking opportunities for optimizing VLSI integrated circuits will find this book as an invaluable reference, since there is no existing book that covers this material in a systematic fashion.
Download or read book Asian Test Symposium written by and published by . This book was released on 1998 with total page 560 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Exploiting Communication Complexity for Multi level Logic Synthesis written by Ting-Ting Hwang and published by . This book was released on 1989 with total page 27 pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: "We present in this paper a multi-level logic synthesis technique based on minimizing communication complexity. Intuitively, we believe this approach is viable because for many types of circuits lower bounds on the area to implement those circuits have been obtained considering only communication complexity. This approach performs especially well for functions which are hierarchically decomposable (e.g., adders, parity generators, comparators, etc.). Unlike many other multi-level logic synthesis techniques, a lower bound can be computed to determine how well the synthesis was performed. We also present a new multi-level logic synthesis program based on the techniques described for reducing communication complexity."
Download or read book Electrical Electronics Abstracts written by and published by . This book was released on 1997 with total page 1948 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book 18th IEEE VLSI Test Symposium written by and published by Institute of Electrical & Electronics Engineers(IEEE). This book was released on 2000 with total page 528 pages. Available in PDF, EPUB and Kindle. Book excerpt: Proceedings of a spring 2000 symposium, highlighting novel ideas and approaches to current and future problems related to testing of electronic circuits and systems. Themes are microprocessor test/validation, low power BIST and scan, technology trends, scan- related approaches, defect-driven techniques, and system-on-chip test techniques. Other subjects are analog test techniques, temperature and process drift issues, test compaction and design validation, analog BIST, and functional test and verification issues. Also covered are STIL extension, IDDQ test, and on-line testing and fault tolerance. Lacks a subject index. Annotation copyrighted by Book News, Inc., Portland, OR.
Download or read book Automatic Logic Synthesis Techniques for Digital Systems written by Martyn D. Edwards and published by Palgrave. This book was released on 1992 with total page 210 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Logic Synthesis for Control Automata written by Samary Baranov and published by Springer. This book was released on 2013-07-13 with total page 393 pages. Available in PDF, EPUB and Kindle. Book excerpt: Logic Synthesis for Control Automata provides techniques for logic design of very complex control units with hardly any constraints on their size, i.e. the number of inputs, outputs and states. These techniques cover all stages of control unit design, including: description of control unit behavior by using operator schemes of algorithms (binary decision trees) and various transformations of these descriptions -- composition, decomposition, minimization, etc.; synthesis of a control automaton (finite-state machine); synthesis of an automaton logic circuit: with matrix structure as a part of LSI or VLSI circuits; as multilevel circuit with logic gates; with standard LSI and VLSI circuits with and without memory. Each chapter contains many examples, illustrating the use of the models and methods described. Moreover, the special last chapter demonstrates in detail the whole design methodology presented in the previous chapters, through the examples of the logic design for a control unit. The models, methods and algorithms described in the book can be applied to a broad class of digital system design problems including design of complex controllers, robots, control units of computers and for designing CAD systems of VLSI circuits using FPGA, PLD and SIC technologies. Logic Synthesis for Control Automata is a valuable reference for graduate students, researchers and engineers involved in the design of very complex controllers, VLSI circuits and CAD systems. The inclusion of many examples and problems makes it most suitable for a course on the subject.
Download or read book Science Abstracts written by and published by . This book was released on 1995 with total page 1360 pages. Available in PDF, EPUB and Kindle. Book excerpt:
