Download or read book Fault Simulation and Test Pattern Generation for Synchronous and Asynchronous Sequential Circuits written by Hyung Ki Lee and published by . This book was released on 1993 with total page 390 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Test Generation of Crosstalk Delay Faults in VLSI Circuits written by S. Jayanthy and published by Springer. This book was released on 2018-09-20 with total page 161 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.
Download or read book Automatic Test Pattern Generation for Synchronous Sequential Circuits written by Marinus Hendrik Konijnenburg and published by . This book was released on 1998 with total page 226 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book An Approach to Test Pattern Generation for Synchronous Sequential Circuits written by Robert Stewart Lewis and published by . This book was released on 1967 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book PARIS written by Nikolaus Gouders and published by . This book was released on 1991 with total page 4 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Testing of Digital Systems written by N. K. Jha and published by Cambridge University Press. This book was released on 2003-05-08 with total page 1022 pages. Available in PDF, EPUB and Kindle. Book excerpt: Device testing represents the single largest manufacturing expense in the semiconductor industry, costing over $40 billion a year. The most comprehensive and wide ranging book of its kind, Testing of Digital Systems covers everything you need to know about this vitally important subject. Starting right from the basics, the authors take the reader through automatic test pattern generation, design for testability and built-in self-test of digital circuits before moving on to more advanced topics such as IDDQ testing, functional testing, delay fault testing, memory testing, and fault diagnosis. The book includes detailed treatment of the latest techniques including test generation for various fault models, discussion of testing techniques at different levels of integrated circuit hierarchy and a chapter on system-on-a-chip test synthesis. Written for students and engineers, it is both an excellent senior/graduate level textbook and a valuable reference.
Download or read book A Study of Fault Diagnosis of Sequential Logic Networks written by B. D. Carroll and published by . This book was released on 1974 with total page 25 pages. Available in PDF, EPUB and Kindle. Book excerpt: The research conducted on this project was concerned with the problem of test pattern generation for sequential logic circuits. More specifically, an algorithm was sought for generating test patterns for detecting single stuck-at faults in synchronous sequential circuits containing clocked flip-flop memory elements. In addition to the principal problem stated above, the related problems of test pattern generation for combinational iterative logic arrays and of test pattern generation for multiple faults in combinational logic circuits were also studied. A summary of the results obtained and the conclusions reached on the above problems is given. Suggestions for follow-on studies are discussed. Reprints of all papers published on the project are included in an appendix.
Download or read book Data Parallel Fault Simulation for Combinational and Sequential Circuits written by Minesh Balkrishan Amin and published by . This book was released on 1996 with total page 264 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Testing of Digital Systems written by N. K. Jha and published by Cambridge University Press. This book was released on 2003-05-08 with total page 1016 pages. Available in PDF, EPUB and Kindle. Book excerpt: Device testing represents the single largest manufacturing expense in the semiconductor industry, costing over $40 billion a year. The most comprehensive and wide-ranging book of its kind, Testing of Digital Systems covers everything you need to know about this vitally important subject. Starting right from the basics, the authors take the reader through every key area, including detailed treatment of the latest techniques such as system-on-a-chip and IDDQ testing. Written for students and engineers, it is both an excellent senior/graduate level textbook and a valuable reference.
Download or read book A Hybrid Fault Simulator for Synchronous Sequential Circuits written by International Computer Science Institute and published by . This book was released on 1994 with total page 14 pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: "Fault simulation for synchronous sequential circuits is a very time consuming task. The complexity of the task increases if there is no information about the initial state of the circuit available. In this case, an unknown initial state is assumed which is usually handled by introducing a three-valued logic. It is known, that fault simulation based upon this logic only determines a lower bound for the fault coverage achievable by a test sequence. Therefore, we develop a hybrid fault simulator H-FS combining the advantages of a fault simulator using the three-valued logic and of an exact symbolic fault simulator based upon binary decision diagrams. H-FS is able to to handle even the largest benchmark circuits and thereby determines fault coverages much more accurately."
Download or read book Dynamic Fault Collapsing and Diagnostic Test Pattern Generation for Sequential Circuits written by and published by . This book was released on 1998 with total page 0 pages. Available in PDF, EPUB and Kindle. Book excerpt: In this paper, we present results for significantly improving the performance of sequential circuit diagnostic test pattern generation (DATPG). Our improvements are achieved by developing results that permit dynamic, fully functional, collapsing of candidate faults. Fault collapsing permits the organization of faults into disjoint partitions based on the indistinguishability relation. These results are used to develop a diagnostic test pattern generation algorithm that has the same order of complexity as that of detection oriented test generation (ATPG). Techniques to identify untestable faults, based on exploiting indistinguishability identification, are also presented. Experimental results are presented on the ISCAS 89 benchmark circuits.
Download or read book SURPASS Fast Trace based Fault Simulation for Synchronous Sequential Circuits written by Ohyoung Song and published by . This book was released on 1991 with total page 36 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Test Generation for Detecting Multiple Stuck Faults in Synchronous Sequential Circuits Using Boolean Difference and Transition Matrix Techniques written by Thiep V. Nguyen and published by . This book was released on 1993 with total page 0 pages. Available in PDF, EPUB and Kindle. Book excerpt: The Boolean difference is a mathematical concept which has proved its usefulness in the study of single and multiple stuck-at faults in combinational circuits. This tool of analysis was extended to cover multiple stuck-at faults in synchronous sequential circuits as well. In this dissertation, modifications to previous work are presented, together with the development of a new method for deriving the required shortest test sequence to detect a specified multiple fault. First, the vector Boolean difference technique is utilized to determine the input vector that will produce a difference in output between the fault-free and faulty circuits with both starting in the same initial state. If that detection cannot be achieved immediately, then the state transition matrices of both circuits are combined and used to form a matrix of detecting state pairs. Each of these pairs comprises of the present states of both circuits for which an output difference will be detected by an input vector. The detecting tree is then built leading the two circuits from the same initial state to the first detecting state found to complete the search for the shortest test sequence. Besides being able to identify, at an early stage, faults that are undetectable, this algorithm guarantees the generation of a shortest test sequence, if one exists, for every multiple stuck-at fault in a synchronous sequential circuit having a synchronizing sequence or a known initial state. A computer program was also written as a tool to automatically generate test sequences for detecting single or multiple faults in both combinational and synchronous sequential circuits.
Download or read book Parallel Algorithms for Sequential Circuit Fault Simulation and Test Generation written by Dilip Krishnaswamy and published by . This book was released on 1997 with total page 220 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book New methods for parallel fast fault simulation for synchronous sequential circuits written by Mehrdad Mojtahedi and published by . This book was released on 1992 with total page 40 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book On Improving the Performance of Parallel Fault Simulation for Synchronous Sequential Circuits written by Chin-Yaw Tiew and published by . This book was released on 1993 with total page 176 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Digital Logic Testing and Simulation written by Alexander Miczo and published by John Wiley & Sons. This book was released on 2003-10-24 with total page 697 pages. Available in PDF, EPUB and Kindle. Book excerpt: Your road map for meeting today's digital testing challenges Today, digital logic devices are common in products that impact public safety, including applications in transportation and human implants. Accurate testing has become more critical to reliability, safety, and the bottom line. Yet, as digital systems become more ubiquitous and complex, the challenge of testing them has become more difficult. As one development group designing a RISC stated, "the work required to . . . test a chip of this size approached the amount of effort required to design it." A valued reference for nearly two decades, Digital Logic Testing and Simulation has been significantly revised and updated for designers and test engineers who must meet this challenge. There is no single solution to the testing problem. Organized in an easy-to-follow, sequential format, this Second Edition familiarizes the reader with the many different strategies for testing and their applications, and assesses the strengths and weaknesses of the various approaches. The book reviews the building blocks of a successful testing strategy and guides the reader on choosing the best solution for a particular application. Digital Logic Testing and Simulation, Second Edition covers such key topics as: * Binary Decision Diagrams (BDDs) and cycle-based simulation * Tester architectures/Standard Test Interface Language (STIL) * Practical algorithms written in a Hardware Design Language (HDL) * Fault tolerance * Behavioral Automatic Test Pattern Generation (ATPG) * The development of the Test Design Expert (TDX), the many obstacles encountered and lessons learned in creating this novel testing approach Up-to-date and comprehensive, Digital Logic Testing and Simulation is an important resource for anyone charged with pinpointing faulty products and assuring quality, safety, and profitability.
