Download or read book Digital Circuit Testing and Testability written by Parag K. Lala and published by Academic Press. This book was released on 1997 with total page 222 pages. Available in PDF, EPUB and Kindle. Book excerpt: An easy to use introduction to the practices and techniques in the field of digital circuit testing. Lala writes in a user-friendly and tutorial style, making the book easy to read, even for the newcomer to fault-tolerant system design. Each informative chapter is self-contained, with little or no previous knowledge of a topic assumed. Extensive references follow each chapter.
Download or read book Multiple Fault Detection in Combinational Network Topologies written by Carlos E. Tobon and published by . This book was released on 1989 with total page 488 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Testing for multiple intermittent failures in combinational circuits by maximizing the probability of fault detection written by Stanford University Stanford Electronics Laboratories. Digital Systems Laboratory and published by . This book was released on 1977 with total page 36 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Spectral Techniques and Fault Detection written by Marg Karpovsky and published by Elsevier. This book was released on 2012-12-02 with total page 619 pages. Available in PDF, EPUB and Kindle. Book excerpt: Spectral Techniques and Fault Detection focuses on the spectral techniques for the analysis, testing, and design of digital devices. This book discusses the error detection and correction in digital devices. Organized into 10 chapters, this book starts with an overview of the concepts and tools to evaluate the applicability of various spectral approaches and fault-detection techniques to the design. This text then describes the class of generalized Programmable Logic Array configurations called Encoded PLAs. Other chapters consider the two-sided Chrestenson Transform to the analysis of some pattern properties. This book describes as well a certain type of cellular arrays for highly parallel processing, namely, three-dimensional arrays. The final chapter deals with the system design methods that allow and encourage designers to incorporate the necessary distributed error correction throughout any digital system. This book is a valuable resource for graduate students and engineers working in the fields of logic design, spectral techniques, testing, and self-testing of digital devices.
Download or read book Fault Masking in Combinational Logic Circuits written by Stanford University Stanford Electronics Laboratories. Digital Systems Laboratory and published by . This book was released on 1974 with total page 40 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Detection of Multiple Faults in MOS Circuits written by F. Joel Ferguson and published by . This book was released on 1989 with total page 34 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Assessing Fault Model and Test Quality written by Kenneth M. Butler and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 142 pages. Available in PDF, EPUB and Kindle. Book excerpt: For many years, the dominant fault model in automatic test pattern gen eration (ATPG) for digital integrated circuits has been the stuck-at fault model. The static nature of stuck-at fault testing when compared to the extremely dynamic nature of integrated circuit (IC) technology has caused many to question whether or not stuck-at fault based testing is still viable. Attempts at answering this question have not been wholly satisfying due to a lack of true quantification, statistical significance, and/or high computational expense. In this monograph we introduce a methodology to address the ques tion in a manner which circumvents the drawbacks of previous approaches. The method is based on symbolic Boolean functional analyses using Or dered Binary Decision Diagrams (OBDDs). OBDDs have been conjectured to be an attractive representation form for Boolean functions, although cases ex ist for which their complexity is guaranteed to grow exponentially with input cardinality. Classes of Boolean functions which exploit the efficiencies inherent in OBDDs to a very great extent are examined in Chapter 7. Exact equa tions giving their OBDD sizes are derived, whereas until very recently only size bounds have been available. These size equations suggest that straight forward applications of OBDDs to design and test related problems may not prove as fruitful as was once thought.
Download or read book Scientific and Technical Aerospace Reports written by and published by . This book was released on 1977 with total page 1082 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Simulation in the Design of Digital Electronic Systems written by John B. Gosling and published by Cambridge University Press. This book was released on 1993-10-29 with total page 302 pages. Available in PDF, EPUB and Kindle. Book excerpt: This description of the structure of simulators suitable for use in the design of digital electronic systems includes the compiled code and event driven algorithms for digital electronic system simulators, together with timing verification as well as structural limitations and problems.
Download or read book Recent Progress in the Boolean Domain written by Bernd Steinbach and published by Cambridge Scholars Publishing. This book was released on 2014-04-23 with total page 455 pages. Available in PDF, EPUB and Kindle. Book excerpt: In today’s world, people are using more and more digital systems in daily life. Such systems utilize the elementariness of Boolean values. A Boolean variable can carry only two different Boolean values: FALSE or TRUE (0 or 1), and has the best interference resistance in technical systems. However, a Boolean function exponentially depends on the number of its variables. This exponential complexity is the cause of major problems in the process of design and realization of circuits. According to Moore’s Law, the complexity of digital systems approximately doubles every 18 months. This requires comprehensive knowledge and techniques to solve very complex Boolean problems. This book summarizes the recent progress in the Boolean domain in solving such issues. Part 1 describes the most powerful approaches in solving exceptionally complex Boolean problems. It is shown how an extremely rare solution could be found in a gigantic search space of more than 10^195 (this is a number of 196 decimal digits) different color patterns. Part 2 describes new research into digital circuits that realize Boolean functions. This part contains the chapters “Design” and “Test”, which present solutions to problems of power dissipation, and the testing of digital circuits using a special data structure, as well as further topics. Part 3 contributes to the scientific basis of future circuit technologies, investigating the need for completely new design methods for the atomic level of quantum computers. This section also concerns itself with circuit structures in reversible logic as the basis for quantum logic.
Download or read book Self Checking and Fault Tolerant Digital Design written by Parag K. Lala and published by Morgan Kaufmann. This book was released on 2001 with total page 238 pages. Available in PDF, EPUB and Kindle. Book excerpt: With VLSI chip transistors getting smaller and smaller, today's digital systems are more complex than ever before. This increased complexity leads to more cross-talk, noise, and other sources of transient errors during normal operation. Traditional off-line testing strategies cannot guarantee detection of these transient faults. And with critical applications relying on faster, more powerful chips, fault-tolerant, self-checking mechanisms must be built in to assure reliable operation. Self-Checking and Fault-Tolerant Digital Design deals extensively with self-checking design techniques and is the only book that emphasizes major techniques for hardware fault tolerance. Graduate students in VLSI design courses as well as practicing designers will appreciate this balanced treatment of the concepts and theory underlying fault tolerance along with the practical techniques used to create fault-tolerant systems. Features: Introduces reliability theory and the importance of maintainability Presents coding and the construction of several error detecting and correcting codes Discusses in depth, the available techniques for fail-safe design of combinational circuits Details checker design techniques for detecting erroneous bits and encoding output of self-checking circuits Demonstrates how to design self-checking sequential circuits, including a technique for fail-safe state machine design
Download or read book Models in Hardware Testing written by Hans-Joachim Wunderlich and published by Springer Science & Business Media. This book was released on 2009-11-12 with total page 263 pages. Available in PDF, EPUB and Kindle. Book excerpt: Model based testing is the most powerful technique for testing hardware and software systems. Models in Hardware Testing describes the use of models at all the levels of hardware testing. The relevant fault models for nanoscaled CMOS technology are introduced, and their implications on fault simulation, automatic test pattern generation, fault diagnosis, memory testing and power aware testing are discussed. Models and the corresponding algorithms are considered with respect to the most recent state of the art, and they are put into a historical context by a concluding chapter on the use of physical fault models in fault tolerance.
Download or read book Large Scale Integration Digital Testing written by T. F. Leedy and published by . This book was released on 1979 with total page 52 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Hardware Acceleration of EDA Algorithms written by Sunil P Khatri and published by Springer Science & Business Media. This book was released on 2010-03-11 with total page 207 pages. Available in PDF, EPUB and Kindle. Book excerpt: Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technology. This is a signi?cant problem for electronic design automation (EDA) applications, since the design complexity of VLSI integrated circuits (ICs) is continuously growing. In this research monograph, we evaluate custom ICs, ?eld-programmable gate arrays (FPGAs), and graphics processors as platforms for accelerating EDA algorithms, instead of the general-purpose sing- threaded CPU. We study applications which are used in key time-consuming steps of the VLSI design ?ow. Further, these applications also have different degrees of inherent parallelism in them. We study both control-dominated EDA applications and control plus data parallel EDA applications. We accelerate these applications on these different hardware platforms. We also present an automated approach for accelerating certain uniprocessor applications on a graphics processor. This monograph compares custom ICs, FPGAs, and graphics processing units (GPUs) as potential platforms to accelerate EDA algorithms. It also provides details of the programming model used for interfacing with the GPUs.
Download or read book Architecture Design for Soft Errors written by Shubu Mukherjee and published by Morgan Kaufmann. This book was released on 2011-08-29 with total page 361 pages. Available in PDF, EPUB and Kindle. Book excerpt: Architecture Design for Soft Errors provides a comprehensive description of the architectural techniques to tackle the soft error problem. It covers the new methodologies for quantitative analysis of soft errors as well as novel, cost-effective architectural techniques to mitigate them. To provide readers with a better grasp of the broader problem definition and solution space, this book also delves into the physics of soft errors and reviews current circuit and software mitigation techniques. There are a number of different ways this book can be read or used in a course: as a complete course on architecture design for soft errors covering the entire book; a short course on architecture design for soft errors; and as a reference book on classical fault-tolerant machines. This book is recommended for practitioners in semi-conductor industry, researchers and developers in computer architecture, advanced graduate seminar courses on soft errors, and (iv) as a reference book for undergraduate courses in computer architecture. - Helps readers build-in fault tolerance to the billions of microchips produced each year, all of which are subject to soft errors - Shows readers how to quantify their soft error reliability - Provides state-of-the-art techniques to protect against soft errors
Download or read book FTCS 14 written by and published by . This book was released on 1984 with total page 480 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Testing and Diagnosis of VLSI and ULSI written by F. Lombardi and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 531 pages. Available in PDF, EPUB and Kindle. Book excerpt: This volume contains a collection of papers presented at the NATO Advanced Study Institute on ·Testing and Diagnosis of VLSI and ULSI" held at Villa Olmo, Como (Italy) June 22 -July 3,1987. High Density technologies such as Very-Large Scale Integration (VLSI), Wafer Scale Integration (WSI) and the not-so-far promises of Ultra-Large Scale Integration (ULSI), have exasperated the problema associated with the testing and diagnosis of these devices and systema. Traditional techniques are fast becoming obsolete due to unique requirements such as limited controllability and observability, increasing execution complexity for test vector generation and high cost of fault simulation, to mention just a few. New approaches are imperative to achieve the highly sought goal of the • three months· turn around cycle time for a state-of-the-art computer chip. The importance of testing and diagnostic processes is of primary importance if costs must be kept at acceptable levels. The objective of this NATO-ASI was to present, analyze and discuss the various facets of testing and diagnosis with respect to both theory and practice. The contents of this volume reflect the diversity of approaches currently available to reduce test and diagnosis time. These approaches are described in a concise, yet clear way by renowned experts of the field. Their contributions are aimed at a wide readership: the uninitiated researcher will find the tutorial chapters very rewarding. The expert wiII be introduced to advanced techniques in a very comprehensive manner.
