Download or read book MOSFET Channel Engineering Using Strained Si and Strained Ge Grown on SiGe Virtual Substrates written by Minjoo Lawrence Lee and published by . This book was released on 2003 with total page 161 pages. Available in PDF, EPUB and Kindle. Book excerpt: (Cont.) While [epsilon]-Si p-MOSFETs tend to lose much of their mobility enhancement at large vertical fields, previous work shows that the situation improves as x in the Si[sub]l-x Ge[sub]x virtual substrate is increased to 0.5. The work presented here demonstrates that enhancements continue to improve for even higher Ge content. At x = 0.7, hole mobility enhancements of 2.9 times were observed with no degradation at very large inversion densities (i.e.>101̂3cm-̂2). Also, for the first time, a p-MOSFET with mobility enhancements that are independent of inversion density has been demonstrated through the use of a digital-alloy heterostructure. In general, it is shown that engineering the layer structure allows great control over the slope of hole mobility versus gate overdrive and that hole mobility enhancements that increase or remain constant with respect to inversion density can be attained. While the first demonstration of high hole mobility in strained Ge ([epsilon]-Ge) was published nearly 10 years ago, little or no work on enhancement mode p-MOSFETs utilizing [epsilon]-Ge had been published prior to this thesis ...

Download or read book High Mobility Strained Si SiGe Heterostructure MOSFETs written by Christopher W. Leitz and published by . This book was released on 2002 with total page 178 pages. Available in PDF, EPUB and Kindle. Book excerpt: (Cont.) Record mobility strained Si p-MOSFETs have been fabricated on relaxed 40% Ge virtual substrates. Hole mobility enhancements saturate at virtual substrate compositions of 40% Ge and above, with mobility enhancements over twice that of co-processed bulk Si devices. In contrast, hole mobility in strained Si p-MOSFETs displays no strong dependence on strained layer thickness. These results indicate that strain is the primary variable in determining hole mobility in strained Si p-MOSFETs and that symmetric electron and hole mobility enhancements in strained Si MOSFETs can be obtained for virtual substrate compositions beyond 35% Ge. The effect of alloy scattering on carrier mobility in tensile strained SiGe surface channel MOSFETs is measured directly for the first time. Electron mobility is degraded much more severely than hole mobility in these heterostructures, in agreement with theoretical predictions. Dual channel heterostructures, which consist of the combination of buried compressively strained SiilyGey buried channels and tensile strained Si surface channels, grown on relaxed SilxGex virtual substrates, are explored in detail for the first time. Hole mobilities exceeding 700 cm2/V-s have been achieved by combining tensile strained Si surface channels and compressively strained 80% Ge buried channels grown on relaxed 50% Ge virtual substrates. This layer sequence exhibits nearly symmetric electron and hole mobilities, both enhanced relative to bulk Si ...

Download or read book SiGe Virtual Substrate Engineering for Integration of III V Materials Microelectromechanical Systems and Strained Silicon MOSFETs with Silicon written by Matthew Thomas Currie and published by . This book was released on 2001 with total page 191 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Strain Engineered MOSFETs written by C.K. Maiti and published by CRC Press. This book was released on 2018-10-03 with total page 320 pages. Available in PDF, EPUB and Kindle. Book excerpt: Currently strain engineering is the main technique used to enhance the performance of advanced silicon-based metal-oxide-semiconductor field-effect transistors (MOSFETs). Written from an engineering application standpoint, Strain-Engineered MOSFETs introduces promising strain techniques to fabricate strain-engineered MOSFETs and to methods to assess the applications of these techniques. The book provides the background and physical insight needed to understand new and future developments in the modeling and design of n- and p-MOSFETs at nanoscale. This book focuses on recent developments in strain-engineered MOSFETS implemented in high-mobility substrates such as, Ge, SiGe, strained-Si, ultrathin germanium-on-insulator platforms, combined with high-k insulators and metal-gate. It covers the materials aspects, principles, and design of advanced devices, fabrication, and applications. It also presents a full technology computer aided design (TCAD) methodology for strain-engineering in Si-CMOS technology involving data flow from process simulation to process variability simulation via device simulation and generation of SPICE process compact models for manufacturing for yield optimization. Microelectronics fabrication is facing serious challenges due to the introduction of new materials in manufacturing and fundamental limitations of nanoscale devices that result in increasing unpredictability in the characteristics of the devices. The down scaling of CMOS technologies has brought about the increased variability of key parameters affecting the performance of integrated circuits. This book provides a single text that combines coverage of the strain-engineered MOSFETS and their modeling using TCAD, making it a tool for process technology development and the design of strain-engineered MOSFETs.

Download or read book SiGe and Ge written by David Louis Harame and published by The Electrochemical Society. This book was released on 2006 with total page 1280 pages. Available in PDF, EPUB and Kindle. Book excerpt: The second International SiGe & Ge: Materials, Processing, and Devices Symposium was part of the 2006 ECS conference held in Cancun, Mexico from October 29-Nov 3, 2006. This meeting provided a forum for reviewing and discussing all materials and device related aspects of SiGe & Ge. The hardcover edition includes a bonus CD-ROM containing the PDF of the entire issue.

Download or read book Silicon Germanium SiGe Nanostructures written by Y. Shiraki and published by Elsevier. This book was released on 2011-02-26 with total page 649 pages. Available in PDF, EPUB and Kindle. Book excerpt: Nanostructured silicon-germanium (SiGe) opens up the prospects of novel and enhanced electronic device performance, especially for semiconductor devices. Silicon-germanium (SiGe) nanostructures reviews the materials science of nanostructures and their properties and applications in different electronic devices. The introductory part one covers the structural properties of SiGe nanostructures, with a further chapter discussing electronic band structures of SiGe alloys. Part two concentrates on the formation of SiGe nanostructures, with chapters on different methods of crystal growth such as molecular beam epitaxy and chemical vapour deposition. This part also includes chapters covering strain engineering and modelling. Part three covers the material properties of SiGe nanostructures, including chapters on such topics as strain-induced defects, transport properties and microcavities and quantum cascade laser structures. In Part four, devices utilising SiGe alloys are discussed. Chapters cover ultra large scale integrated applications, MOSFETs and the use of SiGe in different types of transistors and optical devices. With its distinguished editors and team of international contributors, Silicon-germanium (SiGe) nanostructures is a standard reference for researchers focusing on semiconductor devices and materials in industry and academia, particularly those interested in nanostructures. Reviews the materials science of nanostructures and their properties and applications in different electronic devices Assesses the structural properties of SiGe nanostructures, discussing electronic band structures of SiGe alloys Explores the formation of SiGe nanostructuresfeaturing different methods of crystal growth such as molecular beam epitaxy and chemical vapour deposition

Download or read book Hole Transport in Strained SiGe channel MOSFETs written by Leonardo Gomez (Ph. D.) and published by . This book was released on 2010 with total page 167 pages. Available in PDF, EPUB and Kindle. Book excerpt: Since the 90 nm CMOS technology node, geometric scaling of CMOS has been supplemented with strain to boost transistor drive current. Future CMOS technology nodes (i.e. beyond the 32 nm node) will require more significant changes to continue improvements in transistor performance. Novel CMOS channel materials and device architectures are one option for enhancing carrier transport and increasing device performance. In this work strained SiGe and Ge are examined as a means of increasing the drive current in deeply scaled CMOS. As part of this work a novel high mobility strained-Ge on-insulator substrate has been developed, and the hole transport characteristics of short channel and asymmetrically strained-SiGe channel p-MOSFETs have been explored. A thin-body biaxial compressive strained-Si/strained-Ge heterostructure on-insulator (HOI) substrate has been developed, which combines the electrostatic benefits of the thin-body architecture with the transport benefits of biaxial compressive strain. A novel Germanium on Silicon growth method and a low temperature bond and etch-back process have been developed to enable Ge HOI fabrication. P-MOSFETs were also fabricated using these substrates and the hole mobility characteristics were studied. The hole mobility and velocity characteristics of short channel biaxial compressive strained-Si 45 Geo. 55 p-MOSFETs on-insulator have also been examined. Devices with gate lengths down to 65 nm were fabricated. The short channel mobility characteristics were extracted and a 2.4x hole mobility enhancement relative to relaxed-Si was observed. The measured hole velocity enhancement is more modest at about 1.2x. Band structure and ballistic velocity simulations suggest that a more substantial velocity improvement can be expected with the incorporation of added longitudinal uniaxial compressive strain in the SiGe channel. The hole mobility characteristics of biaxial strained SiGe and Ge p-MOSFETs with applied uniaxial strain are also studied. The hole mobility in biaxial compressive strained SiGe is already enhanced relative to relaxed Si. It is observed that this mobility enhancement increases further with the application of 110 longitudinal uniaxial compressive strain. Since hole mobility and velocity are correlated through their dependence on the hole effective mass, a mass driven increase in mobility with applied uniaxial strain should result in an increase in velocity. Simulations have also been performed to estimate the hole effective mass change in asymmetric strained SiGe. Finally the piezo resistance coefficients of strained SiGe are extracted and found to be larger than in Si.

Download or read book SiGe and Si Strained Layer Epitaxy for Silicon Heterostructure Devices written by John D. Cressler and published by CRC Press. This book was released on 2017-12-19 with total page 264 pages. Available in PDF, EPUB and Kindle. Book excerpt: What seems routine today was not always so. The field of Si-based heterostructures rests solidly on the shoulders of materials scientists and crystal growers, those purveyors of the semiconductor “black arts” associated with the deposition of pristine films of nanoscale dimensionality onto enormous Si wafers with near infinite precision. We can now grow near-defect free, nanoscale films of Si and SiGe strained-layer epitaxy compatible with conventional high-volume silicon integrated circuit manufacturing. SiGe and Si Strained-Layer Epitaxy for Silicon Heterostructure Devices tells the materials side of the story and details the many advances in the Si-SiGe strained-layer epitaxy for device applications. Drawn from the comprehensive and well-reviewed Silicon Heterostructure Handbook, this volume defines and details the many advances in the Si/SiGe strained-layer epitaxy for device applications. Mining the talents of an international panel of experts, the book covers modern SiGe epitaxial growth techniques, epi defects and dopant diffusion in thin films, stability constraints, and electronic properties of SiGe, strained Si, and Si-C alloys. It includes appendices on topics such as the properties of Si and Ge, the generalized Moll-Ross relations, integral charge-control relations, and sample SiGe HBT compact model parameters.

Download or read book Strain Induced Effects in Advanced MOSFETs written by Viktor Sverdlov and published by Springer Science & Business Media. This book was released on 2011-01-06 with total page 260 pages. Available in PDF, EPUB and Kindle. Book excerpt: Strain is used to boost performance of MOSFETs. Modeling of strain effects on transport is an important task of modern simulation tools required for device design. The book covers all relevant modeling approaches used to describe strain in silicon. The subband structure in stressed semiconductor films is investigated in devices using analytical k.p and numerical pseudopotential methods. A rigorous overview of transport modeling in strained devices is given.

Download or read book Advanced Gate Stack Source drain and Channel Engineering for Si based CMOS 2 written by Fred Roozeboom and published by The Electrochemical Society. This book was released on 2006 with total page 472 pages. Available in PDF, EPUB and Kindle. Book excerpt: These proceedings describe processing, materials, and equipment for CMOS front-end integration including gate stack, source/drain and channel engineering. Topics: strained Si/SiGe and Si/SiGe on insulator; high-mobility channels including III-V¿s, etc.; nanowires and carbon nanotubes; high-k dielectrics, metal and FUSI gate electrodes; doping/annealing for ultra-shallow junctions; low-resistivity contacts; advanced deposition (e.g. ALD, CVD, MBE), RTP, UV, plasma and laser-assisted processes.

Download or read book Strained SiGe channel P MOSFETs written by Cáit Ní Chléirigh and published by . This book was released on 2007 with total page 173 pages. Available in PDF, EPUB and Kindle. Book excerpt: Conventional Si CMOS intrinsic device performance has improved by 17% per year over the last 30 years through scaling of the gate length of the MOSFET along with process innovations such as the super-steep retrograde channel doping and ultra shallow source-drain junctions. In order to continue performance scaling with gate length for the 90 nm node and beyond (physical gate length 45 nm) an increase in the carrier mobility through the introduction of strain to the Si channel was required. To continue this scaling down to gate lengths of 10 nm new channel materials with superior mobility will be required. Superior hole mobility (up to 10X enhancement over bulk Si channels) and compatibility with mainstream Si processing technology make compressively strained SiGe an attractive channel material for sub 45 nm p-MOSFETs. This research investigates strained SiGe as a suitable channel material for p-MOSFETs using SiGe grown pseudomorphically on both relaxed SiGe and bulk Si substrates. Some of the fundamental and technological challenges that must be faced in order to incorporate SiGe channel materials are addressed, including the impact of heterostructure composition and SiGe channel thickness on mobility and MOSFET off-state leakage, as well as critical thickness and thermal budget constraints. In particular, the impact of the strained channel thickness on mobility is analyzed in detail. This work provides a detailed analysis of the design space for the SiGe heterostructure required to evaluate the trade off's between mobility enhancement, subthreshold characteristics and ease of integration with conventional CMOS processing in order to determine the optimum device structure.

Download or read book Physics of Semiconductor Devices written by K. N. Bhat and published by Alpha Science Int'l Ltd.. This book was released on 2004 with total page 1310 pages. Available in PDF, EPUB and Kindle. Book excerpt: Contributed papers of the workshop held at IIT, Madras, in 2003.

Download or read book Technology Computer Aided Design for Si SiGe and GaAs Integrated Circuits written by G.A. Armstrong and published by IET. This book was released on 2007-11-30 with total page 457 pages. Available in PDF, EPUB and Kindle. Book excerpt: The first book to deal with a broad spectrum of process and device design, and modeling issues related to semiconductor devices, bridging the gap between device modelling and process design using TCAD. Presents a comprehensive perspective of emerging fields and covers topics ranging from materials to fabrication, devices, modelling and applications. Aimed at research-and-development engineers and scientists involved in microelectronics technology and device design via Technology CAD, and TCAD engineers and developers.

Download or read book Investigation on SiGe Selective Epitaxy for Source and Drain Engineering in 22 nm CMOS Technology Node and Beyond written by Guilei Wang and published by Springer Nature. This book was released on 2019-09-20 with total page 115 pages. Available in PDF, EPUB and Kindle. Book excerpt: This thesis presents the SiGe source and drain (S/D) technology in the context of advanced CMOS, and addresses both device processing and epitaxy modelling. As the CMOS technology roadmap calls for continuously downscaling traditional transistor structures, controlling the parasitic effects of transistors, e.g. short channel effect, parasitic resistances and capacitances is becoming increasingly difficult. The emergence of these problems sparked a technological revolution, where a transition from planar to three-dimensional (3D) transistor design occurred in the 22nm technology node. The selective epitaxial growth (SEG) method has been used to deposit SiGe as stressor material in S/D regions to induce uniaxial strain in the channel region. The thesis investigates issues of process integration in IC production and concentrates on the key parameters of high-quality SiGe selective epitaxial growth, with a special focus on its pattern dependency behavior and on key integration issues in both 2D and 3D transistor structures, the goal being to improve future applications of SiGe SEG in advanced CMOS.

Download or read book Design and Simulation of Strained Si strained SiGe Dual Channel Hetero structure MOSFETs written by Puneet Goyal and published by . This book was released on 2007 with total page 212 pages. Available in PDF, EPUB and Kindle. Book excerpt: "With a unified physics-based model linking MOSFET performance to carrier mobility and drive current, it is shown that nearly continuous carrier mobility increase has been achieved by introduction of process-induced and global-induced strain, which has been responsible for increase in device performance commensurately with scaling. Strained silicon-germanium technology is a hot research area, explored by many different research groups for present and future CMOS technology, due to its high hole mobility and easy process integration with silicon. Several heterostructure architectures for strained Si/SiGe have been shown in the literature. A dual channel heterostructure consisting of strained Si/Si1-xGex on a relaxed SiGe buffer provides a platform for fabricating MOS transistors with high drive currents, resulting from high carrier mobility and carrier velocity, due to presence of compressively strained silicon germanium layer. This works reports the design, modeling and simulation of NMOS and PMOS transistors with a tensile strained Si channel layer and compressively strained SiGe channel layer for a 65 nm logic technology node. Since most of the recent work on development of strained Si/SiGe has been experimental in nature, developments of compact models are necessary to predict the device behavior. A unified modeling approach consisting of different physics-based models has been formulated in this work and their ability to predict the device behavior has been investigated. In addition to this, quantum mechanical simulations were performed in order to investigate and model the device behavior. High p/n-channel drive currents of 0.43 and 0.98 mA/Gm, respectively, are reported in this work. However with improved performance, ~ 10% electrostatic degradation was observed in PMOS due to buried channel device"--Abstract.

Download or read book Strained Ge and GeSn Band Engineering for Si Photonic Integrated Circuits written by Yijie Huo and published by Stanford University. This book was released on 2010 with total page 139 pages. Available in PDF, EPUB and Kindle. Book excerpt: The on-chip interconnect bandwidth limitation is becoming an increasingly critical challenge for integrated circuits (ICs) as device scaling continues to push the speed and density of ICs. Silicon photonics has the ability to solve this emerging problem due to its high speed, high bandwidth, low power consumption, and ability to be monolithically integrated on silicon. Most of the key devices for Si photonic ICs have already been demonstrated. However, a practical CMOS compatible coherent light source is still a major challenge. Germanium (Ge) has already been demonstrated to be a promising material for optoelectronic devices, such as photo-detectors and modulators. However, Ge is an indirect band gap semiconductor, which makes Ge-based light sources very inefficient and limits their practical use. Fortunately, the direct [uppercase Gamma] valley of the Ge conduction band is only 0.14 eV higher than the indirect L valley, suggesting that with band-structure engineering, Ge has the potential to become a direct band gap material and an efficient light emitter. In this dissertation, we first discuss our work on highly biaxial tensile strained Ge grown by molecular beam epitaxy (MBE). Relaxed step-graded InGaAs buffer layers, which are prepared with low temperature growth and high temperature annealing, are used to provide a larger lattice constant substrate to produce tensile strain in Ge epitaxial layers. Up to 2.3% in-plane biaxial tensile strained thin Ge epitaxial layers were achieved with smooth surfaces and low threading dislocation density. A strong increase of photoluminescence with highly tensile strained Ge layers at low temperature suggests that a direct band gap semiconductor has been achieved. This dissertation also presents our work on more than 9% Sn incorporation in epitaxial GeSn alloys using a low temperature MBE growth method. This amount of Sn is 10 times greater than the solid-solubility of Sn in crystalline Ge. Material characterization shows good crystalline quality without Sn precipitation or phase segregation. With increasing Sn percentage, direct band gap narrowing is observed by optical transmission measurements. The studies described in this dissertation will help enable efficient germanium based CMOS compatible coherent light sources. Other possible applications of this work are also discussed in the concluding chapter.

Download or read book Advanced Nanoscale MOSFET Architectures written by Kalyan Biswas and published by John Wiley & Sons. This book was released on 2024-05-29 with total page 340 pages. Available in PDF, EPUB and Kindle. Book excerpt: Comprehensive reference on the fundamental principles and basic physics dictating metal–oxide–semiconductor field-effect transistor (MOSFET) operation Advanced Nanoscale MOSFET Architectures provides an in-depth review of modern metal–oxide–semiconductor field-effect transistor (MOSFET) device technologies and advancements, with information on their operation, various architectures, fabrication, materials, modeling and simulation methods, circuit applications, and other aspects related to nanoscale MOSFET technology. The text begins with an introduction to the foundational technology before moving on to describe challenges associated with the scaling of nanoscale devices. Other topics covered include device physics and operation, strain engineering for highly scaled MOSFETs, tunnel FET, graphene based field effect transistors, and more. The text also compares silicon bulk and devices, nanosheet transistors and introduces low-power circuit design using advanced MOSFETs. Additional topics covered include: High-k gate dielectrics and metal gate electrodes for multi-gate MOSFETs, covering gate stack processing and metal gate modification Strain engineering in 3D complementary metal-oxide semiconductors (CMOS) and its scaling impact, and strain engineering in silicon–germanium (SiGe) FinFET and its challenges and future perspectives TCAD simulation of multi-gate MOSFET, covering model calibration and device performance for analog and RF applications Description of the design of an analog amplifier circuit using digital CMOS technology of SCL for ultra-low power VLSI applications Advanced Nanoscale MOSFET Architectures helps readers understand device physics and design of new structures and material compositions, making it an important resource for the researchers and professionals who are carrying out research in the field, along with students in related programs of study.