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Book High Mobility Strained Si SiGe Heterostructure MOSFETs

Download or read book High Mobility Strained Si SiGe Heterostructure MOSFETs written by Christopher W. Leitz and published by . This book was released on 2002 with total page 178 pages. Available in PDF, EPUB and Kindle. Book excerpt: (Cont.) Record mobility strained Si p-MOSFETs have been fabricated on relaxed 40% Ge virtual substrates. Hole mobility enhancements saturate at virtual substrate compositions of 40% Ge and above, with mobility enhancements over twice that of co-processed bulk Si devices. In contrast, hole mobility in strained Si p-MOSFETs displays no strong dependence on strained layer thickness. These results indicate that strain is the primary variable in determining hole mobility in strained Si p-MOSFETs and that symmetric electron and hole mobility enhancements in strained Si MOSFETs can be obtained for virtual substrate compositions beyond 35% Ge. The effect of alloy scattering on carrier mobility in tensile strained SiGe surface channel MOSFETs is measured directly for the first time. Electron mobility is degraded much more severely than hole mobility in these heterostructures, in agreement with theoretical predictions. Dual channel heterostructures, which consist of the combination of buried compressively strained SiilyGey buried channels and tensile strained Si surface channels, grown on relaxed SilxGex virtual substrates, are explored in detail for the first time. Hole mobilities exceeding 700 cm2/V-s have been achieved by combining tensile strained Si surface channels and compressively strained 80% Ge buried channels grown on relaxed 50% Ge virtual substrates. This layer sequence exhibits nearly symmetric electron and hole mobilities, both enhanced relative to bulk Si ...

Book Strained Si Heterostructure Field Effect Devices

Download or read book Strained Si Heterostructure Field Effect Devices written by C.K Maiti and published by CRC Press. This book was released on 2007-01-11 with total page 438 pages. Available in PDF, EPUB and Kindle. Book excerpt: A combination of the materials science, manufacturing processes, and pioneering research and developments of SiGe and strained-Si have offered an unprecedented high level of performance enhancement at low manufacturing costs. Encompassing all of these areas, Strained-Si Heterostructure Field Effect Devices addresses the research needs associated wi

Book Design and Simulation of Strained Si strained SiGe Dual Channel Hetero structure MOSFETs

Download or read book Design and Simulation of Strained Si strained SiGe Dual Channel Hetero structure MOSFETs written by Puneet Goyal and published by . This book was released on 2007 with total page 212 pages. Available in PDF, EPUB and Kindle. Book excerpt: "With a unified physics-based model linking MOSFET performance to carrier mobility and drive current, it is shown that nearly continuous carrier mobility increase has been achieved by introduction of process-induced and global-induced strain, which has been responsible for increase in device performance commensurately with scaling. Strained silicon-germanium technology is a hot research area, explored by many different research groups for present and future CMOS technology, due to its high hole mobility and easy process integration with silicon. Several heterostructure architectures for strained Si/SiGe have been shown in the literature. A dual channel heterostructure consisting of strained Si/Si1-xGex on a relaxed SiGe buffer provides a platform for fabricating MOS transistors with high drive currents, resulting from high carrier mobility and carrier velocity, due to presence of compressively strained silicon germanium layer. This works reports the design, modeling and simulation of NMOS and PMOS transistors with a tensile strained Si channel layer and compressively strained SiGe channel layer for a 65 nm logic technology node. Since most of the recent work on development of strained Si/SiGe has been experimental in nature, developments of compact models are necessary to predict the device behavior. A unified modeling approach consisting of different physics-based models has been formulated in this work and their ability to predict the device behavior has been investigated. In addition to this, quantum mechanical simulations were performed in order to investigate and model the device behavior. High p/n-channel drive currents of 0.43 and 0.98 mA/Gm, respectively, are reported in this work. However with improved performance, ~ 10% electrostatic degradation was observed in PMOS due to buried channel device"--Abstract.

Book Transport in Thin body MOSFETs Fabricated in Strained Si and Strained Si SiGe Heterostructures on Insulator

Download or read book Transport in Thin body MOSFETs Fabricated in Strained Si and Strained Si SiGe Heterostructures on Insulator written by Ingvar Åberg and published by . This book was released on 2006 with total page 183 pages. Available in PDF, EPUB and Kindle. Book excerpt: (Cont.) Comparisons between SSDOI of two strain levels indicate benefits of strain engineering down to 3 nm thickness. The hole mobility in HOI is improved compared to that in SSDOI, due to the high hole mobility in the Si1-zGez channel. The mobility enhancement is similar at low and high hole densities even at moderate strain levels. The hole mobility in HOI with SiGe channel thickness below 10 nm is observed to follow a similar dependence on channel thickness as hole mobility in SSDOI. Simulations of electrostatics in HOI and SSDOI with ultra-thin channel thicknesses indicate similarities in the confinement of the inversion charge in ultra-thin body HOI and SSDOI. This suggests that the similar reduction of hole mobility in HOI and SSDOI with 4-10 nm-thick channels is associated with an increase in phonon scattering from the reduced effective channel thickness.

Book Technology for SiGe Heterostructure based CMOS Devices

Download or read book Technology for SiGe Heterostructure based CMOS Devices written by Mark Albert Armstrong and published by . This book was released on 1999 with total page 312 pages. Available in PDF, EPUB and Kindle. Book excerpt: Bulk silicon is currently the substrate material of choice for the manufacture of high performance digital circuits due to its highly-developed processing technology and the relatively low cost for high-quality substrates. Silicon-based MOSFETs have reached remarkable levels of performance through device scaling. However, with each technology generation, it is becoming harder and harder to improve device performance at the same pace through traditional scaling methods alone. Short-channel effects such as velocity saturation and drain-induced barrier lowering have placed an fundamental limit on the ultimate performance of bulk Si MOSFETS. One way to raise this limit is to increase the carrier mobilities in the channel. This can be done using high-mobility Si and SiGe strained-layers. Unlike III-V-based high-mobility materials, Si/SiGe strained-layers have the advantage of being largely compatible with mainstream Si processing, which is important from a financial feasibility standpoint. This thesis examines several issues related to Si/SiGe strained-layer devices and their integration into mainstream CMOS. The first part of this work strives to predict the performance leverage of high-mobility Si/ SiGe over bulk Si devices and circuits in a realistic manner. Two-dimensional hydrodynamic simulations are used to predict static device characteristics including effects of series resistance, velocity saturation and velocity overshoot. The simulations show enhanced current drive over bulk Si devices at 0.2 [mu]m effective channel length and highlight the importance of velocity overshoot in high-mobility submicron devices. The circuit performance of Si/SiGe devices is determined from transient simulations of CMOS ring oscillators including the effects of parasitic capacitance and drain-to-source voltage at the onset of saturation Vds.sat. The simulations show a 4 to 6-fold reduction in power-delay product as compared to bulk CMOS oscillators operated at 2.5 V with the same design rules. The remainder of the thesis focuses on the fabrication and characterization of strained-Si NMOS devices. The vehicle for this work is a novel short-flow, single-mask MOSFET which can be fabbed in as little as a week. This device is superior to simple Hall mobility structures which suffer from leakage through the substrate, an inability to control the. carrier concentration and the uncertainty associated with the Hall scattering factor. I investigate a novel buried-channel strained-Si NMOS structure incorporating an n-type donor layer beneath the strained-Si channel to encourage occupation of the buried channel and increase the overall mobility. Peak mobility in a structure without a donor layer reproduces the best results in the literature for buried-channel strained-Si NMOS devices. For structures with donor layers, Coulomb scattering from charges in the donor layer eradicates any benefit from increased buried-channel occupation. I also investigate the effect of well implants on the mobility of surface . channel strained-Si NMOS devices. Similar to the universal mobility curve in bulk Si, mobility at low perpendicular electric field degrades with increasing implant dose while high field mobility is unaffected. The mobility is largely unaffected by a neutral implant species at the same dose. This leads to the conclusion that the material quality of the strained-layer is not affected by the implant, and that the mobility degradation is due solely to increased ionized impurity scattering.

Book Strained Silicon Heterostructures

Download or read book Strained Silicon Heterostructures written by C. K. Maiti and published by IET. This book was released on 2001 with total page 520 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book comprehensively covers the areas of materials growth, characterisation and descriptions for the new devices in siliconheterostructure material systems. In recent years, the development of powerful epitaxial growth techniques such as molecular beam epitaxy (MBE), ultra-high vacuum chemical vapour deposition (UHVCVD) and other low temperature epitaxy techniques has given rise to a new area of research of bandgap engineering in silicon-based materials. This has paved the way not only for heterojunction bipolar and field effect transistors, but also for other fascinating novel quantum devices. This book provides an excellent introduction and valuable references for postgraduate students and research scientists.

Book SiGe and Ge

Download or read book SiGe and Ge written by David Louis Harame and published by The Electrochemical Society. This book was released on 2006 with total page 1280 pages. Available in PDF, EPUB and Kindle. Book excerpt: The second International SiGe & Ge: Materials, Processing, and Devices Symposium was part of the 2006 ECS conference held in Cancun, Mexico from October 29-Nov 3, 2006. This meeting provided a forum for reviewing and discussing all materials and device related aspects of SiGe & Ge. The hardcover edition includes a bonus CD-ROM containing the PDF of the entire issue.

Book Silicon Heterostructure Handbook

Download or read book Silicon Heterostructure Handbook written by John D. Cressler and published by CRC Press. This book was released on 2018-10-03 with total page 1248 pages. Available in PDF, EPUB and Kindle. Book excerpt: An extraordinary combination of material science, manufacturing processes, and innovative thinking spurred the development of SiGe heterojunction devices that offer a wide array of functions, unprecedented levels of performance, and low manufacturing costs. While there are many books on specific aspects of Si heterostructures, the Silicon Heterostructure Handbook: Materials, Fabrication, Devices, Circuits, and Applications of SiGe and Si Strained-Layer Epitaxy is the first book to bring all aspects together in a single source. Featuring broad, comprehensive, and in-depth discussion, this handbook distills the current state of the field in areas ranging from materials to fabrication, devices, CAD, circuits, and applications. The editor includes "snapshots" of the industrial state-of-the-art for devices and circuits, presenting a novel perspective for comparing the present status with future directions in the field. With each chapter contributed by expert authors from leading industrial and research institutions worldwide, the book is unequalled not only in breadth of scope, but also in depth of coverage, timeliness of results, and authority of references. It also includes a foreword by Dr. Bernard S. Meyerson, a pioneer in SiGe technology. Containing nearly 1000 figures along with valuable appendices, the Silicon Heterostructure Handbook authoritatively surveys materials, fabrication, device physics, transistor optimization, optoelectronics components, measurement, compact modeling, circuit design, and device simulation.

Book Strain Engineered MOSFETs

Download or read book Strain Engineered MOSFETs written by C.K. Maiti and published by CRC Press. This book was released on 2018-10-03 with total page 320 pages. Available in PDF, EPUB and Kindle. Book excerpt: Currently strain engineering is the main technique used to enhance the performance of advanced silicon-based metal-oxide-semiconductor field-effect transistors (MOSFETs). Written from an engineering application standpoint, Strain-Engineered MOSFETs introduces promising strain techniques to fabricate strain-engineered MOSFETs and to methods to assess the applications of these techniques. The book provides the background and physical insight needed to understand new and future developments in the modeling and design of n- and p-MOSFETs at nanoscale. This book focuses on recent developments in strain-engineered MOSFETS implemented in high-mobility substrates such as, Ge, SiGe, strained-Si, ultrathin germanium-on-insulator platforms, combined with high-k insulators and metal-gate. It covers the materials aspects, principles, and design of advanced devices, fabrication, and applications. It also presents a full technology computer aided design (TCAD) methodology for strain-engineering in Si-CMOS technology involving data flow from process simulation to process variability simulation via device simulation and generation of SPICE process compact models for manufacturing for yield optimization. Microelectronics fabrication is facing serious challenges due to the introduction of new materials in manufacturing and fundamental limitations of nanoscale devices that result in increasing unpredictability in the characteristics of the devices. The down scaling of CMOS technologies has brought about the increased variability of key parameters affecting the performance of integrated circuits. This book provides a single text that combines coverage of the strain-engineered MOSFETS and their modeling using TCAD, making it a tool for process technology development and the design of strain-engineered MOSFETs.

Book Investigation of the Electron Transport and Electrostatics of Nanoscale Strained Si Si Ge Heterostructure MOSFETs

Download or read book Investigation of the Electron Transport and Electrostatics of Nanoscale Strained Si Si Ge Heterostructure MOSFETs written by Hasan Munir Nayfeh and published by . This book was released on 2003 with total page 179 pages. Available in PDF, EPUB and Kindle. Book excerpt: This thesis presents work aimed at investigating the possible benefit of strained-Si/SiGe heterostructure MOSFETs designed for nanoscale (sub-50-nm) gate lengths with the aid of device fabrication and electrical measurements combined with computer simulation. MOSFET devices fabricated on bulk-Si material are scaled in order to achieve gains in performance and integration. However, as device dimensions continue to scale, physical constraints are being reached that may limit continued scaling and/or the gains in performance from scaling. In order to continue the benefits of scaling, a possible solution is to change to a strained-Si/SiGe material system where enhanced electron mobility of 1.7-2X has been demonstrated for long-channel n-type devices. The electron mobility enhancement observed for long channel length devices may not be the same for devices with nanoscale gate length. In particular, increased channel doping, which is required to control short-channel effects can result in degraded transport characteristics. In this work, the impact of high channel doping on mobility enhancements in strained-Si n-MOSFETs is investigated experimentally. Increased channel doping will increase Coulomb scattering interactions increasing its influence on the overall mobility. Electron transport models were calibrated using experimental data for both strained and un-strained Si devices for various channel doping concentrations. The transport models were then used to investigate, by computer simulation, the performance enhancement of nanoscale strained Si devices for equivalent off-current.

Book Silicon Heterostructure Devices

Download or read book Silicon Heterostructure Devices written by John D. Cressler and published by CRC Press. This book was released on 2018-10-03 with total page 472 pages. Available in PDF, EPUB and Kindle. Book excerpt: SiGe HBTs are the most mature of the Si heterostructure devices and not surprisingly the most completely researched and discussed in the technical literature. However, new effects and nuances of device operation are uncovered year-after-year as transistor scaling advances and application targets march steadily upward in frequency and sophistication. Providing a comprehensive treatment of SiGe HBTs, Silicon Heterostructure Devices covers an amazingly diverse set of topics, ranging from basic transistor physics to noise, radiation effects, reliability, and TCAD simulation. Drawn from the comprehensive and well-reviewed Silicon Heterostructure Handbook, this text explores SiGe heterojunction bipolar transistors (HBTs), heterostructure FETs, various other heterostructure devices, as well as optoelectronic components. The book provides an overview, characteristics, and derivative applications for each device covered. It discusses device physics, broadband noise, performance limits, reliability, engineered substrates, and self-assembling nanostructures. Coverage of optoelectronic devices includes Si/SiGe LEDs, near-infrared detectors, photonic transistors for integrated optoelectronics, and quantum cascade emitters. In addition to this substantial collection of material, the book concludes with a look at the ultimate limits of SiGe HBTs scaling. It contains easy-to-reference appendices on topics including the properties of silicon and germanium, the generalized Moll-Ross relations, and the integral charge-control model, and sample SiGe HBT compact model parameters.

Book Silicon Germanium Strained Layers and Heterostructures

Download or read book Silicon Germanium Strained Layers and Heterostructures written by M. Willander and published by Elsevier. This book was released on 2003-10-02 with total page 325 pages. Available in PDF, EPUB and Kindle. Book excerpt: The study of Silicone Germanium strained layers has broad implications for material scientists and engineers, in particular those working on the design and modelling of semi-conductor devices. Since the publication of the original volume in 1994, there has been a steady flow of new ideas, new understanding, new Silicon-Germanium (SiGe) structures and new devices with enhanced performance. Written for both students and senior researchers, the 2nd edition of Silicon-Germanium Strained Layers and Heterostructures provides an essential up-date of this important topic, describing in particular the recent developments in technology and modelling. * Fully-revised and updated 2nd edition incorporating important recent breakthroughs and a complete literature review* The extensive bibliography of over 400 papers provides a comprehensive and coherent overview of the subject* Appropriate for students and senior researchers

Book MOSFET Channel Engineering Using Strained Si and Strained Ge Grown on SiGe Virtual Substrates

Download or read book MOSFET Channel Engineering Using Strained Si and Strained Ge Grown on SiGe Virtual Substrates written by Minjoo Lawrence Lee and published by . This book was released on 2003 with total page 161 pages. Available in PDF, EPUB and Kindle. Book excerpt: (Cont.) While [epsilon]-Si p-MOSFETs tend to lose much of their mobility enhancement at large vertical fields, previous work shows that the situation improves as x in the Si[sub]l-x Ge[sub]x virtual substrate is increased to 0.5. The work presented here demonstrates that enhancements continue to improve for even higher Ge content. At x = 0.7, hole mobility enhancements of 2.9 times were observed with no degradation at very large inversion densities (i.e.>101̂3cm-̂2). Also, for the first time, a p-MOSFET with mobility enhancements that are independent of inversion density has been demonstrated through the use of a digital-alloy heterostructure. In general, it is shown that engineering the layer structure allows great control over the slope of hole mobility versus gate overdrive and that hole mobility enhancements that increase or remain constant with respect to inversion density can be attained. While the first demonstration of high hole mobility in strained Ge ([epsilon]-Ge) was published nearly 10 years ago, little or no work on enhancement mode p-MOSFETs utilizing [epsilon]-Ge had been published prior to this thesis ...

Book SiGe  materials  Processing  and Devices

Download or read book SiGe materials Processing and Devices written by David Louis Harame and published by The Electrochemical Society. This book was released on 2004 with total page 1242 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Book The VLSI Handbook

Download or read book The VLSI Handbook written by Wai-Kai Chen and published by CRC Press. This book was released on 2018-10-03 with total page 2320 pages. Available in PDF, EPUB and Kindle. Book excerpt: For the new millenium, Wai-Kai Chen introduced a monumental reference for the design, analysis, and prediction of VLSI circuits: The VLSI Handbook. Still a valuable tool for dealing with the most dynamic field in engineering, this second edition includes 13 sections comprising nearly 100 chapters focused on the key concepts, models, and equations. Written by a stellar international panel of expert contributors, this handbook is a reliable, comprehensive resource for real answers to practical problems. It emphasizes fundamental theory underlying professional applications and also reflects key areas of industrial and research focus. WHAT'S IN THE SECOND EDITION? Sections on... Low-power electronics and design VLSI signal processing Chapters on... CMOS fabrication Content-addressable memory Compound semiconductor RF circuits High-speed circuit design principles SiGe HBT technology Bipolar junction transistor amplifiers Performance modeling and analysis using SystemC Design languages, expanded from two chapters to twelve Testing of digital systems Structured for convenient navigation and loaded with practical solutions, The VLSI Handbook, Second Edition remains the first choice for answers to the problems and challenges faced daily in engineering practice.

Book SiGe and Si Strained Layer Epitaxy for Silicon Heterostructure Devices

Download or read book SiGe and Si Strained Layer Epitaxy for Silicon Heterostructure Devices written by John D. Cressler and published by CRC Press. This book was released on 2017-12-19 with total page 264 pages. Available in PDF, EPUB and Kindle. Book excerpt: What seems routine today was not always so. The field of Si-based heterostructures rests solidly on the shoulders of materials scientists and crystal growers, those purveyors of the semiconductor “black arts” associated with the deposition of pristine films of nanoscale dimensionality onto enormous Si wafers with near infinite precision. We can now grow near-defect free, nanoscale films of Si and SiGe strained-layer epitaxy compatible with conventional high-volume silicon integrated circuit manufacturing. SiGe and Si Strained-Layer Epitaxy for Silicon Heterostructure Devices tells the materials side of the story and details the many advances in the Si-SiGe strained-layer epitaxy for device applications. Drawn from the comprehensive and well-reviewed Silicon Heterostructure Handbook, this volume defines and details the many advances in the Si/SiGe strained-layer epitaxy for device applications. Mining the talents of an international panel of experts, the book covers modern SiGe epitaxial growth techniques, epi defects and dopant diffusion in thin films, stability constraints, and electronic properties of SiGe, strained Si, and Si-C alloys. It includes appendices on topics such as the properties of Si and Ge, the generalized Moll-Ross relations, integral charge-control relations, and sample SiGe HBT compact model parameters.

Book Modelling and Simulation of Si SiGe Heterostructure Devices

Download or read book Modelling and Simulation of Si SiGe Heterostructure Devices written by Norulhuda Abd Rasheid and published by . This book was released on 2002 with total page 236 pages. Available in PDF, EPUB and Kindle. Book excerpt: Complemetary metal-oxide-semiconductor (CMOS) is currently the most dominant technology used in making integrated systems. It consists of both n-channel MOS transistor (NMOS) and p-channel MOS transistor (PMOS) fabricated on the same substrate. Conventionally, the substrate is made of silicon. Alternatively, the substrate can be made from different layer of semiconductors known as heterostructure. Much attention has been given to Si/SiGe due to its compatibility with silicon and the higher carrier mobilities. SiGe is an alloy which is said to be an alternative solution to the problem of a down-scaled CMOS to produce high speed device. This work consists of modeling three different of Si/SiGe heterostructure substrates which are used to construct n- and p-channel MOSFETs and later to construct CMOS inverter. The three types of heterostructures are a strained SiGe on silicon substrate, a strained silicon on relaxed SiGe/Si substrate and a strained SiGe on strained Si/relaxed layers of SiGe/Si substrate. A device simulator, Avanti MEDICI Version 1999.2 is used in this project. Although it has heterojunction capability, it does not support model for a strained Si. This work also highlights the method to simulate Si/SiGe heterostructures containing strained layer using MEDICI. Simulations on the band structure and current-voltage (I-V) characteristics of the MOSFETs are carried out. The Id-Vg and Id-Vd are simulated for different value of Ge% and mobility. This is to observe the effect of varying the value of Ge% and mobility used in the design. The simulation on the CMOS inverter as the fundamental circuit is carried out to obtain the transfer curve. The noise margin and switching characteristics can be extracted from the transfer curve. All the simulated results are then compared with the Si bulk, the analyses show that the performance of the Si/SiGe heterostructures is better in terms of the electrical characteristics of the MOSFETs and the switching characteristics of the CMOS inverter, as compared to the performance of the Si bulk.