Download or read book Fault Simulation and Transistor level Test Generation for Physical Failures in MOS Circuits written by Hsi-Ching Shih and published by . This book was released on 1986 with total page 202 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Fault Simulation and Transisto level Test generation for Physical Failures in MOS Circuits written by Hsi-Ching Shih and published by . This book was released on 1987 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Defect Oriented Testing for CMOS Analog and Digital Circuits written by Manoj Sachdev and published by Springer Science & Business Media. This book was released on 2013-06-29 with total page 317 pages. Available in PDF, EPUB and Kindle. Book excerpt: Defect oriented testing is expected to play a significant role in coming generations of technology. Smaller feature sizes and larger die sizes will make ICs more sensitive to defects that can not be modeled by traditional fault modeling approaches. Furthermore, with increased level of integration, an IC may contain diverse building blocks. Such blocks include, digital logic, PLAs, volatile and non-volatile memories, and analog interfaces. For such diverse building blocks, traditional fault modeling and test approaches will become increasingly inadequate. Defect oriented testing methods have come a long way from a mere interesting academic exercise to a hard industrial reality. Many factors have contributed to its industrial acceptance. Traditional approaches of testing modern integrated circuits (ICs) have been found to be inadequate in terms of quality and economics of test. In a globally competitive semiconductor market place, overall product quality and economics have become very important objectives. In addition, electronic systems are becoming increasingly complex and demand components of highest possible quality. Testing, in general and, defect oriented testing, in particular, help in realizing these objectives. Defect Oriented Testing for CMOS Analog and Digital Circuits is the first book to provide a complete overview of the subject. It is essential reading for all design and test professionals as well as researchers and students working in the field. `A strength of this book is its breadth. Types of designs considered include analog and digital circuits, programmable logic arrays, and memories. Having a fault model does not automatically provide a test. Sometimes, design for testability hardware is necessary. Many design for testability ideas, supported by experimental evidence, are included.' ... from the Foreword by Vishwani D. Agrawal

Download or read book IDDQ Testing of VLSI Circuits written by Ravi K. Gulati and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 121 pages. Available in PDF, EPUB and Kindle. Book excerpt: Power supply current monitoring to detect CMOS IC defects during production testing quietly laid down its roots in the mid-1970s. Both Sandia Labs and RCA in the United States and Philips Labs in the Netherlands practiced this procedure on their CMOS ICs. At that time, this practice stemmed simply from an intuitive sense that CMOS ICs showing abnormal quiescent power supply current (IDDQ) contained defects. Later, this intuition was supported by data and analysis in the 1980s by Levi (RACD, Malaiya and Su (SUNY-Binghamton), Soden and Hawkins (Sandia Labs and the University of New Mexico), Jacomino and co-workers (Laboratoire d'Automatique de Grenoble), and Maly and co-workers (Carnegie Mellon University). Interest in IDDQ testing has advanced beyond the data reported in the 1980s and is now focused on applications and evaluations involving larger volumes of ICs that improve quality beyond what can be achieved by previous conventional means. In the conventional style of testing one attempts to propagate the logic states of the suspended nodes to primary outputs. This is done for all or most nodes of the circuit. For sequential circuits, in particular, the complexity of finding suitable tests is very high. In comparison, the IDDQ test does not observe the logic states, but measures the integrated current that leaks through all gates. In other words, it is like measuring a patient's temperature to determine the state of health. Despite perceived advantages, during the years that followed its initial announcements, skepticism about the practicality of IDDQ testing prevailed. The idea, however, provided a great opportunity to researchers. New results on test generation, fault simulation, design for testability, built-in self-test, and diagnosis for this style of testing have since been reported. After a decade of research, we are definitely closer to practice.

Download or read book Building the Information Society written by Rene Jacquart and published by Springer. This book was released on 2008-04-08 with total page 739 pages. Available in PDF, EPUB and Kindle. Book excerpt: In the context of the 18th IFIP World Computer Congress (WCC’04), and beside the traditional organization of conferences, workshops, tutorials and student forum, it was decided to identify a range of topics of dramatic interest for the building of the Information Society. This has been featured as the "Topical day/session" track of the WCC’04. Topical Sessions have been selected in order to present syntheses, latest developments and/or challenges in different business and technical areas. Building the Information Society provides a deep perspective on domains including: the semantic integration of heterogeneous data, virtual realities and new entertainment, fault tolerance for trustworthy and dependable information infrastructures, abstract interpretation (and its use for verification of program properties), multimodal interaction, computer aided inventing, emerging tools and techniques for avionics certification, bio-, nano-, and information technologies, E-learning, perspectives on ambient intelligence, the grand challenge of building a theory of the Railway domain, open source software in dependable systems, interdependencies of critical infrastructure, social robots, as a challenge for machine intelligence. Building the Information Society comprises the articles produced in support of the Topical Sessions during the IFIP 18th World Computer Congress, which was held in August 2004 in Toulouse, France, and sponsored by the International Federation for Information Processing (IFIP).

Download or read book The Evolution of Fault Tolerant Computing written by A. Avizienis and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 467 pages. Available in PDF, EPUB and Kindle. Book excerpt: For the editors of this book, as well as for many other researchers in the area of fault-tolerant computing, Dr. William Caswell Carter is one of the key figures in the formation and development of this important field. We felt that the IFIP Working Group 10.4 at Baden, Austria, in June 1986, which coincided with an important step in Bill's career, was an appropriate occasion to honor Bill's contributions and achievements by organizing a one day "Symposium on the Evolution of Fault-Tolerant Computing" in the honor of William C. Carter. The Symposium, held on June 30, 1986, brought together a group of eminent scientists from all over the world to discuss the evolu tion, the state of the art, and the future perspectives of the field of fault-tolerant computing. Historic developments in academia and industry were presented by individuals who themselves have actively been involved in bringing them about. The Symposium proved to be a unique historic event and these Proceedings, which contain the final versions of the papers presented at Baden, are an authentic reference document.

Download or read book Semiconductor Device Reliability written by A. Christou and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 571 pages. Available in PDF, EPUB and Kindle. Book excerpt: This publication is a compilation of papers presented at the Semiconductor Device Reliabi lity Workshop sponsored by the NATO International Scientific Exchange Program. The Workshop was held in Crete, Greece from June 4 to June 9, 1989. The objective of the Workshop was to review and to further explore advances in the field of semiconductor reliability through invited paper presentations and discussions. The technical emphasis was on quality assurance and reliability of optoelectronic and high speed semiconductor devices. The primary support for the meeting was provided by the Scientific Affairs Division of NATO. We are indebted to NATO for their support and to Dr. Craig Sinclair, who admin isters this program. The chapters of this book follow the format and order of the sessions of the meeting. Thirty-six papers were presented and discussed during the five-day Workshop. In addi tion, two panel sessions were held, with audience participation, where the particularly controversial topics of bum-in and reliability modeling and prediction methods were dis cussed. A brief review of these sessions is presented in this book.

Download or read book Defect Oriented Testing for Nano Metric CMOS VLSI Circuits written by Manoj Sachdev and published by Springer Science & Business Media. This book was released on 2007-06-04 with total page 343 pages. Available in PDF, EPUB and Kindle. Book excerpt: The 2nd edition of defect oriented testing has been extensively updated. New chapters on Functional, Parametric Defect Models and Inductive fault Analysis and Yield Engineering have been added to provide a link between defect sources and yield. The chapter on RAM testing has been updated with focus on parametric and SRAM stability testing. Similarly, newer material has been incorporated in digital fault modeling and analog testing chapters. The strength of Defect Oriented Testing for nano-Metric CMOS VLSIs lies in its industrial relevance.

Download or read book Fast Fault Simulation and Compact Test Generation written by T. Ramakrishnan and published by . This book was released on 1991 with total page 368 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Proceedings of the Midwest Symposium on Circuits and Systems written by and published by . This book was released on 1992 with total page 848 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book VLSI Fault Modeling and Testing Techniques written by George W. Zobrist and published by Praeger. This book was released on 1993 with total page 216 pages. Available in PDF, EPUB and Kindle. Book excerpt: VLSI systems are becoming very complex and difficult to test. Traditional stuck-at fault problems may be inadequate to model possible manufacturing defects in the integrated ciruit. Hierarchial models are needed that are easy to use at the transistor and functional levels. Stuck-open faults present severe testing problems in CMOS circuits, to overcome testing problems testable designs are utilized. Bridging faults are important due to the shrinking geometry of ICs. BIST PLA schemes have common features-controllability and observability - which are enhanced through additional logic and test points. Certain circuit topologies are more easily testable than others. The amount of reconvergent fan-out is a critical factor in determining realistic measures for determining test generation difficulty. Test implementation is usually left until after the VLSI data path has been synthesized into a structural description. This leads to investigation methodologies for performing design synthesis with test incorporation. These topics and more are discussed.

Download or read book IEEE Proceedings of the Southeastcon written by and published by . This book was released on 1989 with total page 534 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Proceedings of the 31st Midwest Symposium on Circuits and Systems August 9 12 1988 Marriott s Pavilion Hotel St Louis Missouri written by Linda R. Laub and published by [United States] : Steering Committee, Midwest Symposium on Circuits and Systems. This book was released on 1988 with total page 1308 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Switch level Fault Simulation of MOS VLSI Circuits written by Evstratios Vandris and published by . This book was released on 1991 with total page 304 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Dependable Multicore Architectures at Nanoscale written by Marco Ottavi and published by Springer. This book was released on 2017-08-28 with total page 294 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides comprehensive coverage of the dependability challenges in today's advanced computing systems. It is an in-depth discussion of all the technological and design-level techniques that may be used to overcome these issues and analyzes various dependability-assessment methods. The impact of individual application scenarios on the definition of challenges and solutions is considered so that the designer can clearly assess the problems and adjust the solution based on the specifications in question. The book is composed of three sections, beginning with an introduction to current dependability challenges arising in complex computing systems implemented with nanoscale technologies, and of the effect of the application scenario. The second section details all the fault-tolerance techniques that are applicable in the manufacture of reliable advanced computing devices. Different levels, from technology-level fault avoidance to the use of error correcting codes and system-level checkpointing are introduced and explained as applicable to the different application scenario requirements. Finally the third section proposes a roadmap of future trends in and perspectives on the dependability and manufacturability of advanced computing systems from the special point of view of industrial stakeholders. Dependable Multicore Architectures at Nanoscale showcases the original ideas and concepts introduced into the field of nanoscale manufacturing and systems reliability over nearly four years of work within COST Action IC1103 MEDIAN, a think-tank with participants from 27 countries. Academic researchers and graduate students working in multi-core computer systems and their manufacture will find this book of interest as will industrial design and manufacturing engineers working in VLSI companies.

Download or read book An Accurate Timing Model for Fault Simulation in MOS Circuits written by Sungho Kim and published by . This book was released on 1989 with total page 78 pages. Available in PDF, EPUB and Kindle. Book excerpt: With the increasing need for manufacturers to maintain quality requirements for high performance and high density MOS VLSI integrated circuits and the multitude of physical failures and defects that can occur in such circuits, delay fault testing is gaining importance. An extremely important component of such a delay test generation environment is an accurate yet fast delay fault simulator. The goal of fault simulation is to generate the responses of digital circuits under both fault and fault-free conditions, without prohibitive cost. Most simulators available today either sacrifice accuracy or are very time-consuming. Therefore, choosing the right simulation model is the key in fault simulation. MOS circuit models that were previously developed for true value simulation, after being modified to accommodate fault models, have been used by fault simulators, such as FMOSSIM. These fault simulators are incapable of detecting timing errors and even some logic errors, both of which occur in actual failures in the MOS circuits. Others have shown that some faults only affect the circuit timing and the delay may invalidate test sets. Therefore, fault simulators must consider the circuit delay in order to evaluate test sets accurately. FAUST is one such fault simulator which very accurately detects timing as well as logical errors. It was based on using a combination of table lookup and numerical integration techniques to solve differential equations. Keywords: Theses. (RH).

Download or read book Proceedings written by and published by . This book was released on 1985 with total page 728 pages. Available in PDF, EPUB and Kindle. Book excerpt: