Download or read book Compiler Support for Customizable Domain specific Computing written by Hui Huang and published by . This book was released on 2014 with total page 116 pages. Available in PDF, EPUB and Kindle. Book excerpt: It is known that with the support of domain-specific customizable heterogeneous architecture, energy efficiency can be significantly improved by adapting architectures to match the requirements of a given application or application domain. One of the main challenges in this emerging trend is how to efficiently take the advantage of the heterogeneity and customization features in those architectures. This research investigates developing efficient compiler support to automate the platform mapping and code transformation process. First, considering customizable computing engines, we have investigated both tightly-coupled and loosely-coupled computing elements. In terms of tightly-coupled computing engine customization, customizable vector ISA supports are explored to better exploit data-level parallelism in the high performance applications. We identify the needs and opportunities to explore customized vector instructions and quantify their benefits. We build an automatic compilation flow in LLVM-2.7 compiler infrastructure to efficiently identify customized vector instructions from a given set of applications. The memory alignment overhead, which is known to be critical for vector processing efficiency, has been optimized in our customized vector ISA identification flow. To support efficient vector ISA customization, we design a composable vector unit (CVU), which can be used both separately and in a chained mode, to support a large number of virtualized custom vector instructions with minimal area overhead. The results show that our approach achieves an average 27% speedup over the state-of-art vector ISA. Second, in terms of loosely-coupled computing elements, it is known that on-chip accelerators are combined with general-purpose cores in an effort to amortize the cost of the design across many application domains. In recent days programmable accelerators (PA) are widely investigated in the design of domain-specific architectures to improve the system performance and power. Micro-architectures with a series of PAs have been explored to provide more general supports for customization. One important feature in the PA-rich systems is that the target computational kernels are compiled with a set of pre-defined PA templates and dynamically mapped to real PAs at runtime. This imposes a demanding challenge on the compiler side regarding how to generate high-quality PA mapping code. We present an efficient PA compilation flow, which is fairly scalable in mapping large computation kernels into PA-rich architectures and provides support for full pipelined execution to achieve the highest energy efficiency. A concept called maximal PA candidate is proposed to drastically reduce the number of input PA candidates in the mapping phase without influencing the overall mapping optimality. Efficient pre & ndash;selection and pruning techniques are employed to further speedup the maximal PA mapping process. Our experimental results show that for 12 computation-intensive standard benchmarks, the proposed approach achieves a significant improvement on the compilation time comparing to the state-of-art PA compilation approaches. The average mapping quality is improved by 23.8% and 32.5% for connected PA candidates and disjoint ones, respectively. Third, in domain & ndash;specific computing multi & ndash;level software & ndash;controlled memories have been commonly used to better utilize domain & ndash;specific knowledge of particular applications and achieve high performance/energy efficiency. At the level of L1 memory, while conventional cache works well for general workloads, some recent works explore the idea of using a hybrid cache, which can be flexibly partitioned into a traditional cache and an SCM. In the hybrid cache architecture, first & ndash;level SCM has been utilized as prefetch buffer to hide memory access latency. We quantify the impact of data reuse on SCM prefetching efficiency and propose a reuse & ndash;aware SCM prefetching (RASP) scheme, which shows 31.2% performance gain over previous work. On the other hand, SCM has also been widely used in last level on & ndash;board memory to reduce the data movements between computing cores (i.e. host processor and accelerator cores), which is usually transferred through low & ndash;bandwidth bus and known to be one of the major performance bottlenecks in modern heterogeneous systems. To efficiently manage LL & ndash;SCM, we propose a task & ndash;level & ndash;reuse & ndash;graph (TLRM) based LL & ndash;SCM data movement scheme to minimize the amount of data transfers between heterogeneous computing cores through the slow PCIe bus. With the introduction of TLRM, the data movement optimization between host and accelerator cores can be approximated using a linear programming based solution, and an average 25% reduction of host & ndash;accelerator data transfers is observed from previous work.

Download or read book Domain Specific Computer Architectures for Emerging Applications written by Chao Wang and published by CRC Press. This book was released on 2024-06-04 with total page 417 pages. Available in PDF, EPUB and Kindle. Book excerpt: With the end of Moore’s Law, domain-specific architecture (DSA) has become a crucial mode of implementing future computing architectures. This book discusses the system-level design methodology of DSAs and their applications, providing a unified design process that guarantees functionality, performance, energy efficiency, and real-time responsiveness for the target application. DSAs often start from domain-specific algorithms or applications, analyzing the characteristics of algorithmic applications, such as computation, memory access, and communication, and proposing the heterogeneous accelerator architecture suitable for that particular application. This book places particular focus on accelerator hardware platforms and distributed systems for various novel applications, such as machine learning, data mining, neural networks, and graph algorithms, and also covers RISC-V open-source instruction sets. It briefly describes the system design methodology based on DSAs and presents the latest research results in academia around domain-specific acceleration architectures. Providing cutting-edge discussion of big data and artificial intelligence scenarios in contemporary industry and typical DSA applications, this book appeals to industry professionals as well as academicians researching the future of computing in these areas.

Download or read book Languages and Compilers for Parallel Computing written by Barbara Chapman and published by Springer Nature. This book was released on 2022-02-15 with total page 233 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book constitutes the thoroughly refereed post-conference proceedings of the 33rd International Workshop on Languages and Compilers for Parallel Computing, LCPC 2020, held in Stony Brook, NY, USA, in October 2020. Due to COVID-19 pandemic the conference was held virtually. The 15 revised full papers were carefully reviewed and selected from 19 submissions. The contributions were organized in topical sections named as follows: Code and Data Transformations; OpenMP and Fortran; Domain Specific Compilation; Machine Language and Quantum Computing; Performance Analysis; Code Generation.

Download or read book Software for Exascale Computing SPPEXA 2013 2015 written by Hans-Joachim Bungartz and published by Springer. This book was released on 2016-09-14 with total page 557 pages. Available in PDF, EPUB and Kindle. Book excerpt: The research and its outcomes presented in this collection focus on various aspects of high-performance computing (HPC) software and its development which is confronted with various challenges as today's supercomputer technology heads towards exascale computing. The individual chapters address one or more of the research directions (1) computational algorithms, (2) system software, (3) application software, (4) data management and exploration, (5) programming, and (6) software tools. The collection thereby highlights pioneering research findings as well as innovative concepts in exascale software development that have been conducted under the umbrella of the priority programme "Software for Exascale Computing" (SPPEXA) of the German Research Foundation (DFG) and that have been presented at the SPPEXA Symposium, Jan 25-27 2016, in Munich. The book has an interdisciplinary appeal: scholars from computational sub-fields in computer science, mathematics, physics, or engineering will find it of particular interest.

Download or read book Embedded Computing for High Performance written by João Manuel Paiva Cardoso and published by Morgan Kaufmann. This book was released on 2017-06-13 with total page 322 pages. Available in PDF, EPUB and Kindle. Book excerpt: Embedded Computing for High Performance: Design Exploration and Customization Using High-level Compilation and Synthesis Tools provides a set of real-life example implementations that migrate traditional desktop systems to embedded systems. Working with popular hardware, including Xilinx and ARM, the book offers a comprehensive description of techniques for mapping computations expressed in programming languages such as C or MATLAB to high-performance embedded architectures consisting of multiple CPUs, GPUs, and reconfigurable hardware (FPGAs). The authors demonstrate a domain-specific language (LARA) that facilitates retargeting to multiple computing systems using the same source code. In this way, users can decouple original application code from transformed code and enhance productivity and program portability. After reading this book, engineers will understand the processes, methodologies, and best practices needed for the development of applications for high-performance embedded computing systems. Focuses on maximizing performance while managing energy consumption in embedded systems Explains how to retarget code for heterogeneous systems with GPUs and FPGAs Demonstrates a domain-specific language that facilitates migrating and retargeting existing applications to modern systems Includes downloadable slides, tools, and tutorials

Download or read book Generative Programming and Component Engineering written by Gabor Karsai and published by Springer. This book was released on 2004-10-14 with total page 504 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book constitutes the refereed proceedings of the Third International Conference on Generative Programming and Component Engineering, GPCE 2004, held in Vancouver, Canada in October 2004. The 25 revised full papers presented together with abstracts of 2 invited talks were carefully reviewed and selected from 75 submissions. The papers are organized in topical sections on aspect-orientation, staged programming, types for meta-programming, meta-programming, model-driven approaches, product lines, and domain-specific languages and generation.

Download or read book Languages and Compilers for Parallel Computing written by Lawrence Rauchwerger and published by Springer Nature. This book was released on 2019-11-19 with total page 313 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book constitutes the proceedings of the 30th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2017, held in College Station, TX, USA, in October 2017. The 17 full papers presented together with abstracts of 5 keynote talks, 11 invited speakers and 4 poster papers in this volume were carefully reviewed and selected from 26 submissions. LCPC encourages submissions that go outside its original scope of scientific computing to diverse areas that are enable or enhanced by the power of parallel systems such as mobile computing, big data, relevant aspects of machine learning, data centers, cognitive computing, etc. LCPC strongly encourages personal interaction and technical discussions along the initial material.

Download or read book Automatic Tuning of Compilers Using Machine Learning written by Amir H. Ashouri and published by Springer. This book was released on 2017-12-22 with total page 130 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book explores break-through approaches to tackling and mitigating the well-known problems of compiler optimization using design space exploration and machine learning techniques. It demonstrates that not all the optimization passes are suitable for use within an optimization sequence and that, in fact, many of the available passes tend to counteract one another. After providing a comprehensive survey of currently available methodologies, including many experimental comparisons with state-of-the-art compiler frameworks, the book describes new approaches to solving the problem of selecting the best compiler optimizations and the phase-ordering problem, allowing readers to overcome the enormous complexity of choosing the right order of optimizations for each code segment in an application. As such, the book offers a valuable resource for a broad readership, including researchers interested in Computer Architecture, Electronic Design Automation and Machine Learning, as well as computer architects and compiler developers.

Download or read book Architecture Support for Customizable Domain specific Computing written by Chunyue Liu and published by . This book was released on 2012 with total page 154 pages. Available in PDF, EPUB and Kindle. Book excerpt: This dissertation investigates the power-efficient high-performance architecture support for customizable domain-specific computing at both memory and communication levels in a customizable heterogeneous platform (CHP). In domain-specific computing, the memory access pattern can be obtained through offline analysis. With this knowledge, the cores and the accelerators in the CHP can use on-chip scratchpad memory (SPM) and buffers to directly manage the data replacement in order to save off-chip memory bandwidth. We propose efficient schemes to hybrid the SPM and primary caches, and to also hybrid buffers and the shared last-level cache (LLC). In the hybrid primary cache, due to its low associativity, the problem of balancing the cache set utilization when the SPM is allocated in the cache is critical. We propose an adaptive hybrid cache (AH-Cache) to dynamically remap SPM blocks from high-demand cache sets to low-demand cache sets. In the hybrid LLC (typically designed as a nonuniform cache architecture, NUCA), the problem of resource contention and fragmentation becomes crucial. We propose a buffer-in-NUCA (BiN) scheme to assign shared buffer spaces to accelerators that can best utilize the additional buffer space, and use flexible paged buffer allocation to limit the impact of buffer fragmentation. In domain-specific computing, the communication pattern can be also obtained through offline analysis. With this knowledge, the topology and routing scheme in the CHP communication subsystem can be customized to dynamically adapt to the known communication pattern. For the topology customization, we propose application-specific shortcuts and multicast realized by radio frequency interconnects (RF-I) overlaid network-on-chip (NoC). At runtime, we can flexibly allocate RF-I bandwidth to adapt the NoC topology to the known communication requirement of an application. For the routing customization, we propose an power-efficient application-specific cycle elimination and splitting (ACES) routing scheme to avoid restricting the critical routes of an application while achieving deadlock-free for irregular NoCs. To further demonstrate the feasibility and effectiveness of these techniques, we develop a FPGA prototype of the proposed CHP with shared accelerators and buffers. The buffer sharing is achieved through a cost-efficient partial-crossbar to reduce the sharing overhead on timing and area.

Download or read book Languages and Compilers for Parallel Computing written by Hironori Kasahara and published by Springer. This book was released on 2013-04-05 with total page 287 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book constitutes the thoroughly refereed post-conference proceedings of the 25th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2012, held in Tokyo, Japan, in September 2012. The 16 revised full papers, 5 poster papers presented with 1 invited talk were carefully reviewed and selected from 39 submissions. The focus of the papers is on following topics: compiling for parallelism, automatic parallelization, optimization of parallel programs, formal analysis and verification of parallel programs, parallel runtime systems, task-parallel libraries, parallel application frameworks, performance analysis tools, debugging tools for parallel programs, parallel algorithms and applications.

Download or read book Applied Reconfigurable Computing Architectures Tools and Applications written by Iouliia Skliarova and published by Springer Nature. This book was released on with total page 311 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Download or read book Worldwide Computing and Its Applications WWCA 98 written by Yoshifumi Masunaga and published by Springer Science & Business Media. This book was released on 1998-02-16 with total page 504 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book constitutes the refereed proceedings of the Second International Conference on Worldwide Computing and Its Applications, WWCA'98, held in Tsukuba, Japan, in March 1998. This volume presents 14 invited and survey papers together with 20 papers selected by the conference committee. The volume is divided into topical sections on distributed objects, distributed componentware, distributed systems platforms, Internet technology, mobile computing, interculture technology, collaborative media, collaborative support, information discovery and retrieval, novel network applications.

Download or read book Tools for High Performance Computing 2017 written by Christoph Niethammer and published by Springer. This book was released on 2019-02-14 with total page 143 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book presents the proceedings of the 11th International Parallel Tools Workshop, a forum to discuss the latest advances in parallel tools, held September 11-12, 2017 in Dresden, Germany. High-performance computing plays an increasingly important role for numerical simulation and modeling in academic and industrial research. At the same time, using large-scale parallel systems efficiently is becoming more difficult. A number of tools addressing parallel program development and analysis has emerged from the high-performance computing community over the last decade, and what may have started as a collection of a small helper scripts has now matured into production-grade frameworks. Powerful user interfaces and an extensive body of documentation together create a user-friendly environment for parallel tools.

Download or read book Languages and Compilers for Parallel Computing written by Chen Ding and published by Springer. This book was released on 2017-01-20 with total page 351 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book constitutes the thoroughly refereed post-conference proceedings of the 29th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2016, held in Rochester, NY, USA, in September 2016. The 20 revised full papers presented together with 4 short papers were carefully reviewed. The papers are organized in topical sections on large scale parallelism, resilience and persistence, compiler analysis and optimization, dynamic computation and languages, GPUs and private memory, and runt-time and performance analysis.

Download or read book Compilation and Synthesis for Embedded Reconfigurable Systems written by João Manuel Paiva Cardoso and published by Springer Science & Business Media. This book was released on 2013-05-16 with total page 211 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides techniques to tackle the design challenges raised by the increasing diversity and complexity of emerging, heterogeneous architectures for embedded systems. It describes an approach based on techniques from software engineering called aspect-oriented programming, which allow designers to control today’s sophisticated design tool chains, while maintaining a single application source code. Readers are introduced to the basic concepts of an aspect-oriented, domain specific language that enables control of a wide range of compilation and synthesis tools in the partitioning and mapping of an application to a heterogeneous (and possibly multi-core) target architecture. Several examples are presented that illustrate the benefits of the approach developed for applications from avionics and digital signal processing. Using the aspect-oriented programming techniques presented in this book, developers can reuse extensive sections of their designs, while preserving the original application source-code, thus promoting developer productivity as well as architecture and performance portability. Describes an aspect-oriented approach for the compilation and synthesis of applications targeting heterogeneous embedded computing architectures. Includes examples using an integrated tool chain for compilation and synthesis. Provides validation and evaluation for targeted reconfigurable heterogeneous architectures. Enables design portability, given changing target devices· Allows developers to maintain a single application source code when targeting multiple architectures.

Download or read book Embedded Computing written by Joseph A. Fisher and published by Elsevier. This book was released on 2005-01-19 with total page 709 pages. Available in PDF, EPUB and Kindle. Book excerpt: The fact that there are more embedded computers than general-purpose computers and that we are impacted by hundreds of them every day is no longer news. What is news is that their increasing performance requirements, complexity and capabilities demand a new approach to their design. Fisher, Faraboschi, and Young describe a new age of embedded computing design, in which the processor is central, making the approach radically distinct from contemporary practices of embedded systems design. They demonstrate why it is essential to take a computing-centric and system-design approach to the traditional elements of nonprogrammable components, peripherals, interconnects and buses. These elements must be unified in a system design with high-performance processor architectures, microarchitectures and compilers, and with the compilation tools, debuggers and simulators needed for application development. In this landmark text, the authors apply their expertise in highly interdisciplinary hardware/software development and VLIW processors to illustrate this change in embedded computing. VLIW architectures have long been a popular choice in embedded systems design, and while VLIW is a running theme throughout the book, embedded computing is the core topic. Embedded Computing examines both in a book filled with fact and opinion based on the authors many years of R&D experience. · Complemented by a unique, professional-quality embedded tool-chain on the authors' website, http://www.vliw.org/book· Combines technical depth with real-world experience · Comprehensively explains the differences between general purpose computing systems and embedded systems at the hardware, software, tools and operating system levels. · Uses concrete examples to explain and motivate the trade-offs.

Download or read book Transforming Reconfigurable Systems A Festschrift Celebrating The 60th Birthday Of Professor Peter Cheung written by Wayne Luk and published by World Scientific. This book was released on 2015-02-26 with total page 282 pages. Available in PDF, EPUB and Kindle. Book excerpt: Over the last three decades, Professor Peter Cheung has made significant contributions to a variety of areas, such as analogue and digital computer-aided design tools, high-level synthesis and hardware/software codesign, low-power and high-performance circuit architectures for signal and image processing, and mixed-signal integrated-circuit design.However, the area that has attracted his greatest attention is reconfigurable systems and their design, and his work has contributed to the transformation of this important and exciting discipline. This festschrift contains a unique collection of technical papers based on presentations at a workshop at Imperial College London in May 2013 celebrating Professor Cheung's 60th birthday. Renowned researchers who have been inspired and motivated by his outstanding research in the area of reconfigurable systems are brought together from across the globe to offer their latest research in reconfigurable systems. Professor Cheung has devoted much of his professional career to Imperial College London, and has served with distinction as the Head of Department of Electrical and Electronic Engineering for several years. His outstanding capability and his loyalty to Imperial College and the Department of Electrical and Electronic Engineering are legendary. Professor Cheung has made tremendous strides in ensuring excellence in both research and teaching, and in establishing sound governance and strong financial endowment; but above all, he has made his department a wonderful place in which to work and study.